This patch introduces the support of context signle submission. As GVT
context may come from different guests, which requires different
configuration of render registers. It can't be combined in a dual ELSP
submission combo.
We make this function as a context feature in context creation service.
Only GVT-g will create this kinds of GEM context currently.
Signed-off-by: Zhi Wang <zhi.a.wang@xxxxxxxxx>
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_lrc.c | 12 ++++++++++++
2 files changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1c9e865..54dc069 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -888,6 +888,7 @@ struct intel_context {
struct atomic_notifier_head status_notifier_head;
} engine[I915_NUM_ENGINES];
bool use_48bit_addressing_mode;
+ bool single_submission;
struct list_head link;
};
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index aeaea2e..4ea1f32 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -454,6 +454,18 @@ static void execlists_context_unqueue(struct intel_engine_cs *engine)
i915_gem_request_unreference(req0);
req0 = cursor;
} else {
+ /*
+ * req0 (after merged) ctx requires single submission,
+ * stop picking
+ */
+ if (req0->ctx->single_submission)
+ break;
+ /*
+ * req0 ctx doesn't require single submission, but
+ * next req ctx requires, stop picking req1
+ */
+ if (cursor->ctx->single_submission)
+ break;
req1 = cursor;
WARN_ON(req1->elsp_submitted);
break;
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
