On Thu, May 12, 2016 at 10:52:11PM +0000, Patchwork wrote: > == Series Details == > > Series: Pre-calculate SKL-style atomic watermarks (final CI run) (rev2) > URL : https://patchwork.freedesktop.org/series/7075/ > State : success Maarten confirmed on IRC that his r-b stands for the updated version of patch #15, so pushed to dinq. CI was happy this time around, but on a previous iteration it complained about a sporadic BYT failure that we didn't seem to have a bugzilla for yet; I opened a new one at https://bugs.freedesktop.org/show_bug.cgi?id=95372 Matt > > == Summary == > > Series 7075v2 Pre-calculate SKL-style atomic watermarks (final CI run) > http://patchwork.freedesktop.org/api/1.0/series/7075/revisions/2/mbox > > Test kms_flip: > Subgroup basic-flip-vs-wf_vblank: > fail -> PASS (ro-hsw-i7-4770r) > > ro-bdw-i5-5250u total:219 pass:181 dwarn:0 dfail:0 fail:0 skip:38 > ro-bdw-i7-5557U total:219 pass:206 dwarn:0 dfail:0 fail:0 skip:13 > ro-bdw-i7-5600u total:219 pass:187 dwarn:0 dfail:0 fail:0 skip:32 > ro-bsw-n3050 total:219 pass:175 dwarn:0 dfail:0 fail:2 skip:42 > ro-byt-n2820 total:218 pass:175 dwarn:0 dfail:0 fail:2 skip:41 > ro-hsw-i3-4010u total:218 pass:193 dwarn:0 dfail:0 fail:0 skip:25 > ro-hsw-i7-4770r total:219 pass:194 dwarn:0 dfail:0 fail:0 skip:25 > ro-ilk-i7-620lm total:219 pass:151 dwarn:0 dfail:0 fail:1 skip:67 > ro-ilk1-i5-650 total:214 pass:151 dwarn:0 dfail:0 fail:2 skip:61 > ro-ivb-i7-3770 total:219 pass:183 dwarn:0 dfail:0 fail:0 skip:36 > ro-ivb2-i7-3770 total:219 pass:186 dwarn:0 dfail:0 fail:1 skip:32 > ro-skl-i7-6700hq total:214 pass:190 dwarn:0 dfail:0 fail:0 skip:24 > ro-snb-i7-2620M total:219 pass:177 dwarn:0 dfail:0 fail:1 skip:41 > > Results at /archive/results/CI_IGT_test/RO_Patchwork_876/ > > a6ac4ab drm-intel-nightly: 2016y-05m-12d-15h-37m-38s UTC integration manifest > 1096cb7 drm/i915: Remove wm_config from dev_priv/intel_atomic_state > 053fa3d drm/i915/gen9: Reject display updates that exceed wm limitations (v2) > 73fcc6d drm/i915/gen9: Calculate watermarks during atomic 'check' (v2) > 616a9e9 drm/i915/gen9: Propagate watermark calculation failures up the call chain > 9941f42 drm/i915/gen9: Use a bitmask to track dirty pipe watermarks > ea3f449 drm/i915/gen9: Allow watermark calculation on in-flight atomic state (v3) > 7ba9a23 drm/i915/gen9: Calculate plane WM's from state > fe3a3bf drm/i915/gen9: Drop re-allocation of DDB at atomic commit (v2) > 7e4426f drm/i915/gen9: Compute DDB allocation at atomic check time (v4) > f769eb6 drm/i915: Add distrust_bios_wm flag to dev_priv (v2) > 94af186 drm/i915/gen9: Allow skl_allocate_pipe_ddb() to operate on in-flight state (v3) > 4499d87 drm/i915: Track whether an atomic transaction changes the active CRTC's > 0e5fa43 drm/i915/gen9: Store plane minimum blocks in CRTC wm state (v2) > 0979389 drm/i915/gen9: Allow calculation of data rate for in-flight state (v2) > d0b9477 drm/i915/gen9: Cache plane data rates in CRTC state > 77c1d12 drm/i915: Rename s/skl_compute_pipe_wm/skl_build_pipe_wm/ > d9d40b7 drm/i915: Reorganize WM structs/unions in CRTC state > -- Matt Roper Graphics Software Engineer IoTG Platform Enabling & Development Intel Corporation (916) 356-2795 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
