This stores a known value to a register, copies it using
MI_LOAD_REGISTER_REG, then stores from the second register back to
memory, and verifies the value. This ensures that MI_LOAD_REGISTER_REG
is allowed by the command parser, and actually takes effect.
Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
Signed-off-by: Kenneth Graunke <kenneth@xxxxxxxxxxxxx>
---
lib/intel_reg.h | 2 ++
tests/gem_exec_parse.c | 19 +++++++++++++++++++
2 files changed, 21 insertions(+)
This tests functionality I've proposed to merge in version 7 of the
command parser. The corresponding kernel patch is:
drm/i915: Allow MI_LOAD_REGISTER_REG between whitelisted registers.
I'm not sure if there's some procedure for marking tests as requiring
a particular version of the command parser, or what the ordering constraints
on merging kernel patches vs. tests are, so...please advise, or just go ahead
and take care of it :)
Thanks!
diff --git a/lib/intel_reg.h b/lib/intel_reg.h
index 0ffa803..36da4f3 100644
--- a/lib/intel_reg.h
+++ b/lib/intel_reg.h
@@ -2566,6 +2566,8 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define MI_LOAD_SCAN_LINES_INCL (0x12<<23)
#define MI_LOAD_REGISTER_IMM ((0x22 << 23) | 1)
+#define MI_LOAD_REGISTER_REG (0x2A<<23)
+#define MI_STORE_REGISTER_MEM (0x24<<23)
/* Flush */
#define MI_FLUSH (0x04<<23)
diff --git a/tests/gem_exec_parse.c b/tests/gem_exec_parse.c
index 261d45f..aa6c74a 100644
--- a/tests/gem_exec_parse.c
+++ b/tests/gem_exec_parse.c
@@ -470,6 +470,25 @@ igt_main
0x12000000);
}
+ igt_subtest("load_register_reg") {
+ uint32_t pc[] = {
+ MI_LOAD_REGISTER_IMM,
+ 0x2600, /* CS_GPR0 */
+ 0x31337000,
+ MI_LOAD_REGISTER_REG | (3 - 2),
+ 0x2600, /* CS_GPR0 */
+ 0x2608, /* CS_GPR1 */
+ MI_STORE_REGISTER_MEM | (3 - 2),
+ 0x2608,
+ 0, /* To be patched */
+ MI_BATCH_BUFFER_END,
+ };
+ exec_batch_patched(fd, handle,
+ pc, sizeof(pc),
+ 32, /* patch offset, */
+ 0x31337000);
+ }
+
igt_fixture {
gem_close(fd, handle);
--
2.8.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
