Op 03-05-16 om 10:33 schreef Daniel Vetter: > LPT is pch, so might run into the fdi bandwidth constraint (especially > since it has only 2 lanes). But right now we just force pipe_bpp back > to 24, resulting in a nice loop (which we bail out with a loud > WARN_ON). Fix this. > > Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> > References: https://bugs.freedesktop.org/show_bug.cgi?id=93477 > Signed-off-by: Daniel Vetter <daniel.vetter@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_crt.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c > index a2a31fd01d1d..3fbb6fc66451 100644 > --- a/drivers/gpu/drm/i915/intel_crt.c > +++ b/drivers/gpu/drm/i915/intel_crt.c > @@ -261,8 +261,14 @@ static bool intel_crt_compute_config(struct intel_encoder *encoder, > pipe_config->has_pch_encoder = true; > > /* LPT FDI RX only supports 8bpc. */ > - if (HAS_PCH_LPT(dev)) > + if (HAS_PCH_LPT(dev)) { > + if (pipe_config->bw_constrained && pipe_config->pipe_bpp < 24) { > + DRM_DEBUG_KMS("LPT only supports 24bpp\n"); > + return false; > + } > + > pipe_config->pipe_bpp = 24; > + } > > /* FDI must always be 2.7 GHz */ > if (HAS_DDI(dev)) Signed-off-by: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
