On Fri, 29 Apr 2016, Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> wrote: > On Fri, Apr 29, 2016 at 03:34:03PM +0300, Jani Nikula wrote: >> VLV/CHV use intel_gmch_panel_fitting() for eDP and DSI. They don't use >> the border enable software state for anything, so don't set it >> either. This should avoid a state checker warning on lvds_border_bits, >> although one hasn't been spotted in the wild. >> >> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx> >> --- >> drivers/gpu/drm/i915/intel_panel.c | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c >> index 828f0fcaaaf8..d0606b8714a4 100644 >> --- a/drivers/gpu/drm/i915/intel_panel.c >> +++ b/drivers/gpu/drm/i915/intel_panel.c >> @@ -371,7 +371,8 @@ out: >> >> pipe_config->gmch_pfit.control = pfit_control; >> pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios; >> - pipe_config->gmch_pfit.lvds_border_bits = border; >> + if (INTEL_INFO(dev)->gen < 5) >> + pipe_config->gmch_pfit.lvds_border_bits = border; > > Shouldn't actually be needed since we reject the "center" scaling mode > on eDP and DSI, and that's the only one to use the border bit on gen4+. > So no way to get here w/ border!=0 on VLV/CHV I think. Right. It's more than a little tricky to check all the places to make sure... BR, Jani. > >> } >> >> enum drm_connector_status >> -- >> 2.1.4 >> >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
