On Wed, Apr 27, 2016 at 09:02:01AM +0100, Chris Wilson wrote:
> Faced with sporadic machine hangs on gen7, that mimic the issue of
> concurrent writes to the same cacheline and seem to start with
> commit 9b9ed309 (drm/i915: Remove forcewake dance from seqno/irq
> barrier on legacy gen6+), let us restore the spinlock around the mmio
> read.
>
> Fixes: 9b9ed3093613288247a27a55a6dd07f1222150f1
4.7 is frozen, need to re-run dim fixes for this one:
$ dim fixes 9b9ed3093613288247a27a55a6dd07f1222150f1
Fixes: 9b9ed3093613 ("drm/i915: Remove forcewake dance from seqno/irq barrier on legacy gen6+")
Cc: drm-intel-fixes@xxxxxxxxxxxxxxxxxxxxx
> Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
> Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_ringbuffer.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 66f69cdd1d36..ad5bd3808d8b 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1590,7 +1590,10 @@ gen6_seqno_barrier(struct intel_engine_cs *engine)
> * interrupt (with the same net latency).
> */
> struct drm_i915_private *dev_priv = engine->dev->dev_private;
> +
> + spin_lock_irq(&dev_priv->uncore.lock);
> POSTING_READ_FW(RING_ACTHD(engine->mmio_base));
> + spin_unlock_irq(&dev_priv->uncore.lock);
> }
>
> static u32
> --
> 2.8.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
