On to, 2016-04-28 at 07:56 +0100, Chris Wilson wrote: > On Wed, Apr 27, 2016 at 06:11:05PM -0700, tom.orourke@xxxxxxxxx wrote: > > From: Sagar Arun Kamble <sagar.a.kamble@xxxxxxxxx> > > > > intel_runtime_suspend failed with warning if RPS was disabled. > > With SLPC enabled, RPS is disabled. With SLPC, warning is now changed > > to consider SLPC active status as well. This will ensure runtime suspend > > proceeds when SLPC enabled. > > > > v2: Commit message update. (Tom) > > > > Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@xxxxxxxxx> > > Signed-off-by: Tom O'Rourke <Tom.O'Rourke@xxxxxxxxx> > > --- > > drivers/gpu/drm/i915/i915_drv.c | 3 ++- > > 1 file changed, 2 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > > index cc22fa0..00a2713 100644 > > --- a/drivers/gpu/drm/i915/i915_drv.c > > +++ b/drivers/gpu/drm/i915/i915_drv.c > > @@ -1474,7 +1474,8 @@ static int intel_runtime_suspend(struct device *device) > > struct drm_i915_private *dev_priv = dev->dev_private; > > int ret; > > > > - if (WARN_ON_ONCE(!(dev_priv->rps.enabled && intel_enable_rc6(dev)))) > > + if (WARN_ON_ONCE(!((dev_priv->rps.enabled || intel_slpc_active(dev)) && > > + intel_enable_rc6(dev)))) > > The real question here is why does runtime suspend depend on either of > these being enabled (espcially rps!). We need RC6 enabled across a runtime suspend/resume since we depend on the RC6 context to be retained across these transitions. There is no separate knob for RPS and we enable RC6 and RPS together, that's why rps.enabled is checked. --Imre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
