From: Sagar Arun Kamble <sagar.a.kamble@xxxxxxxxx> This patch will inform GuC SLPC about changes in the refresh rate due to Seamless DRRS. Refresh rate changes due to Static DRRS will be notified via commit path. v2: Rebased on previous changed patch and printed error message if H2G action fails. v2(torourke): Updates suggested by Paulo: replace HAS_SLPC with intel_slpc_active. return void instead of ignored error code. Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@xxxxxxxxx> Signed-off-by: Tom O'Rourke <Tom.O'Rourke@xxxxxxxxx> --- drivers/gpu/drm/i915/intel_dp.c | 2 ++ drivers/gpu/drm/i915/intel_slpc.c | 23 +++++++++++++++++++++++ drivers/gpu/drm/i915/intel_slpc.h | 1 + 3 files changed, 26 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index c12c414..3d41f7b 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -5379,6 +5379,8 @@ static void intel_dp_set_drrs_state(struct drm_device *dev, int refresh_rate) dev_priv->drrs.refresh_rate_type = index; DRM_DEBUG_KMS("eDP Refresh Rate set to : %dHz\n", refresh_rate); + + intel_slpc_update_display_rr_info(dev, refresh_rate); } /** diff --git a/drivers/gpu/drm/i915/intel_slpc.c b/drivers/gpu/drm/i915/intel_slpc.c index 7f26284..9e0bc96 100644 --- a/drivers/gpu/drm/i915/intel_slpc.c +++ b/drivers/gpu/drm/i915/intel_slpc.c @@ -364,3 +364,26 @@ void intel_slpc_update_atomic_commit_info(struct drm_device *dev, if (notify) host2guc_slpc_display_mode_change(dev); } + +void intel_slpc_update_display_rr_info(struct drm_device *dev, u32 refresh_rate) +{ + struct drm_i915_private *dev_priv = dev->dev_private; + struct drm_crtc *crtc; + struct intel_display_pipe_info *per_pipe_info; + struct intel_slpc_display_mode_event_params *display_params; + + if (!intel_slpc_active(dev)) + return; + + if (!refresh_rate) + return; + + display_params = &dev_priv->guc.slpc.display_mode_params; + crtc = dp_to_dig_port(dev_priv->drrs.dp)->base.base.crtc; + + per_pipe_info = &display_params->per_pipe_info[to_intel_crtc(crtc)->pipe]; + per_pipe_info->refresh_rate = refresh_rate; + per_pipe_info->vsync_ft_usec = 1000000 / refresh_rate; + + host2guc_slpc_display_mode_change(dev); +} diff --git a/drivers/gpu/drm/i915/intel_slpc.h b/drivers/gpu/drm/i915/intel_slpc.h index 39b4657..0b251a1 100644 --- a/drivers/gpu/drm/i915/intel_slpc.h +++ b/drivers/gpu/drm/i915/intel_slpc.h @@ -153,5 +153,6 @@ void intel_slpc_reset(struct drm_device *dev); void intel_slpc_update_display_mode_info(struct drm_device *dev); void intel_slpc_update_atomic_commit_info(struct drm_device *dev, struct drm_atomic_state *state); +void intel_slpc_update_display_rr_info(struct drm_device *dev, u32 refresh_rate); #endif -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx