== Series Details == Series: Unduplicate CHV phy code (rev4) URL : https://patchwork.freedesktop.org/series/5463/ State : success == Summary == Series 5463v4 Unduplicate CHV phy code http://patchwork.freedesktop.org/api/1.0/series/5463/revisions/4/mbox/ Test kms_pipe_crc_basic: Subgroup hang-read-crc-pipe-c: incomplete -> PASS (bdw-nuci7) bdw-nuci7 total:194 pass:182 dwarn:0 dfail:0 fail:0 skip:12 bdw-ultra total:194 pass:170 dwarn:0 dfail:0 fail:1 skip:23 bsw-nuc-2 total:193 pass:153 dwarn:0 dfail:0 fail:0 skip:40 byt-nuc total:193 pass:155 dwarn:0 dfail:0 fail:0 skip:38 hsw-brixbox total:194 pass:170 dwarn:0 dfail:0 fail:0 skip:24 hsw-gt2 total:194 pass:175 dwarn:0 dfail:0 fail:0 skip:19 ilk-hp8440p total:194 pass:137 dwarn:0 dfail:0 fail:0 skip:57 ivb-t430s total:194 pass:166 dwarn:0 dfail:0 fail:0 skip:28 skl-i7k-2 total:194 pass:168 dwarn:0 dfail:0 fail:1 skip:25 skl-nuci5 total:194 pass:183 dwarn:0 dfail:0 fail:0 skip:11 snb-dellxps total:193 pass:155 dwarn:0 dfail:0 fail:0 skip:38 snb-x220t total:193 pass:154 dwarn:0 dfail:0 fail:1 skip:38 Results at /archive/results/CI_IGT_test/Patchwork_1973/ 9dabb0053b63bc32ab6ad5d13209d1e43395313f drm-intel-nightly: 2016y-04m-21d-09h-27m-12s UTC integration manifest 62760e6 drm/i915: Move VLV HDMI lane reset work around logic to intel_dpio_phy.c c72a1fe drm/i915: Unduplicate pre encoder enabling phy code a12499b drm/i915: Unduplicate VLV phy pre pll enabling code 561312a drm/i915: Unduplicate VLV signal level code 04c65e5 drm/i915: Unduplicate CHV encoders' post pll disable code 31ea416 drm/i915: Unduplicate CHV pre-encoder enabling phy logic 59eb0cd drm/i915: Unduplicate CHV phy-releated pre pll enabling code 53827a4 drm/i915: Unduplicate chv_data_lane_soft_reset() 66e06a6 drm/i915: Unduplicate CHV signal level code 6bb0034 drm/i915: Set crtc_state->lane_count for HDMI _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
