It's possible that BIOS initializes only a single channel on PHY0 and then enables it or only enables PHY0 but leaves PHY1 disabled. This patchset fixes handling of these cases. CC: Matt Roper <matthew.d.roper@xxxxxxxxx> Imre Deak (3): drm/i915/bxt: Use PHY0 GRC value for HW state verification drm/i915/bxt: Wait for PHY1 GRC done if PHY0 was already enabled drm/i915/bxt: Force reprogramming a PHY with invalid HW state drivers/gpu/drm/i915/intel_ddi.c | 43 +++++++++++++++++++++++++++++++--------- 1 file changed, 34 insertions(+), 9 deletions(-) -- 2.5.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
