From: John Harrison <John.C.Harrison@xxxxxxxxx> There are various parameters within the scheduler which can be tuned to improve performance, reduce memory footprint, etc. This change adds support for altering these via debugfs. v2: Updated for priorities now being signed values. v5: Squashed priority bumping entries into this patch rather than a separate patch all of their own. v6: Updated to newer nightly (lots of ring -> engine renaming). Updated to use 'to_i915()' instead of dev_private. [review feedback from Joonas Lahtinen] Added an admin only check when setting the parameters to prevent rogue user code trying to break the system with strange settings. [review feedback from Jesse Barnes] For: VIZ-1587 Signed-off-by: John Harrison <John.C.Harrison@xxxxxxxxx> Reviewed-by: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/i915_debugfs.c | 187 ++++++++++++++++++++++++++++++++++++ 1 file changed, 187 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index e89781a..980bb20 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -39,6 +39,7 @@ #include "intel_ringbuffer.h" #include <drm/i915_drm.h> #include "i915_drv.h" +#include "i915_scheduler.h" enum { ACTIVE_LIST, @@ -1125,6 +1126,186 @@ DEFINE_SIMPLE_ATTRIBUTE(i915_next_seqno_fops, i915_next_seqno_get, i915_next_seqno_set, "0x%llx\n"); +static int +i915_scheduler_priority_min_get(void *data, u64 *val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = to_i915(dev); + struct i915_scheduler *scheduler = dev_priv->scheduler; + + *val = (u64) scheduler->priority_level_min; + return 0; +} + +static int +i915_scheduler_priority_min_set(void *data, u64 val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = to_i915(dev); + struct i915_scheduler *scheduler = dev_priv->scheduler; + + if (!capable(CAP_SYS_ADMIN)) + return -EPERM; + + scheduler->priority_level_min = (int32_t) val; + return 0; +} + +DEFINE_SIMPLE_ATTRIBUTE(i915_scheduler_priority_min_fops, + i915_scheduler_priority_min_get, + i915_scheduler_priority_min_set, + "%lld\n"); + +static int +i915_scheduler_priority_max_get(void *data, u64 *val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = to_i915(dev); + struct i915_scheduler *scheduler = dev_priv->scheduler; + + *val = (u64) scheduler->priority_level_max; + return 0; +} + +static int +i915_scheduler_priority_max_set(void *data, u64 val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = to_i915(dev); + struct i915_scheduler *scheduler = dev_priv->scheduler; + + if (!capable(CAP_SYS_ADMIN)) + return -EPERM; + + scheduler->priority_level_max = (int32_t) val; + return 0; +} + +DEFINE_SIMPLE_ATTRIBUTE(i915_scheduler_priority_max_fops, + i915_scheduler_priority_max_get, + i915_scheduler_priority_max_set, + "%lld\n"); + +static int +i915_scheduler_priority_bump_get(void *data, u64 *val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = to_i915(dev); + struct i915_scheduler *scheduler = dev_priv->scheduler; + + *val = (u64) scheduler->priority_level_bump; + return 0; +} + +static int +i915_scheduler_priority_bump_set(void *data, u64 val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = to_i915(dev); + struct i915_scheduler *scheduler = dev_priv->scheduler; + + if (!capable(CAP_SYS_ADMIN)) + return -EPERM; + + scheduler->priority_level_bump = (u32) val; + return 0; +} + +DEFINE_SIMPLE_ATTRIBUTE(i915_scheduler_priority_bump_fops, + i915_scheduler_priority_bump_get, + i915_scheduler_priority_bump_set, + "%lld\n"); + +static int +i915_scheduler_priority_preempt_get(void *data, u64 *val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = to_i915(dev); + struct i915_scheduler *scheduler = dev_priv->scheduler; + + *val = (u64) scheduler->priority_level_preempt; + return 0; +} + +static int +i915_scheduler_priority_preempt_set(void *data, u64 val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = to_i915(dev); + struct i915_scheduler *scheduler = dev_priv->scheduler; + + if (!capable(CAP_SYS_ADMIN)) + return -EPERM; + + scheduler->priority_level_preempt = (u32) val; + return 0; +} + +DEFINE_SIMPLE_ATTRIBUTE(i915_scheduler_priority_preempt_fops, + i915_scheduler_priority_preempt_get, + i915_scheduler_priority_preempt_set, + "%lld\n"); + +static int +i915_scheduler_min_flying_get(void *data, u64 *val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = to_i915(dev); + struct i915_scheduler *scheduler = dev_priv->scheduler; + + *val = (u64) scheduler->min_flying; + return 0; +} + +static int +i915_scheduler_min_flying_set(void *data, u64 val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = to_i915(dev); + struct i915_scheduler *scheduler = dev_priv->scheduler; + + if (!capable(CAP_SYS_ADMIN)) + return -EPERM; + + scheduler->min_flying = (u32) val; + return 0; +} + +DEFINE_SIMPLE_ATTRIBUTE(i915_scheduler_min_flying_fops, + i915_scheduler_min_flying_get, + i915_scheduler_min_flying_set, + "%llu\n"); + +static int +i915_scheduler_file_queue_max_get(void *data, u64 *val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = to_i915(dev); + struct i915_scheduler *scheduler = dev_priv->scheduler; + + *val = (u64) scheduler->file_queue_max; + return 0; +} + +static int +i915_scheduler_file_queue_max_set(void *data, u64 val) +{ + struct drm_device *dev = data; + struct drm_i915_private *dev_priv = to_i915(dev); + struct i915_scheduler *scheduler = dev_priv->scheduler; + + if (!capable(CAP_SYS_ADMIN)) + return -EPERM; + + scheduler->file_queue_max = (u32) val; + return 0; +} + +DEFINE_SIMPLE_ATTRIBUTE(i915_scheduler_file_queue_max_fops, + i915_scheduler_file_queue_max_get, + i915_scheduler_file_queue_max_set, + "%llu\n"); + static int i915_frequency_info(struct seq_file *m, void *unused) { struct drm_info_node *node = m->private; @@ -5426,6 +5607,12 @@ static const struct i915_debugfs_files { {"i915_gem_drop_caches", &i915_drop_caches_fops}, {"i915_error_state", &i915_error_state_fops}, {"i915_next_seqno", &i915_next_seqno_fops}, + {"i915_scheduler_priority_min", &i915_scheduler_priority_min_fops}, + {"i915_scheduler_priority_max", &i915_scheduler_priority_max_fops}, + {"i915_scheduler_priority_bump", &i915_scheduler_priority_bump_fops}, + {"i915_scheduler_priority_preempt", &i915_scheduler_priority_preempt_fops}, + {"i915_scheduler_min_flying", &i915_scheduler_min_flying_fops}, + {"i915_scheduler_file_queue_max", &i915_scheduler_file_queue_max_fops}, {"i915_display_crc_ctl", &i915_display_crc_ctl_fops}, {"i915_pri_wm_latency", &i915_pri_wm_latency_fops}, {"i915_spr_wm_latency", &i915_spr_wm_latency_fops}, -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx