From: John Harrison <John.C.Harrison@xxxxxxxxx> The seqno value cannot always be used when debugging issues via trace points. This is because it can be reset back to start, especially during TDR type tests. Also, when the scheduler arrives the seqno is only valid while a given request is executing on the hardware. While the request is simply queued waiting for submission, it's seqno value will be zero (meaning invalid). v4: Wrapped a long line to keep the style checker happy. v5: Added uniq to the dispatch trace point [Svetlana Kukanova] For: VIZ-5115 Signed-off-by: John Harrison <John.C.Harrison@xxxxxxxxx> Reviewed-by: Tomas Elf <tomas.elf@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_drv.h | 5 +++++ drivers/gpu/drm/i915/i915_gem.c | 4 +++- drivers/gpu/drm/i915/i915_trace.h | 32 ++++++++++++++++++++++---------- 3 files changed, 30 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index f978539..7492ce7 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2012,6 +2012,8 @@ struct drm_i915_private { struct intel_encoder *dig_port_map[I915_MAX_PORTS]; + uint32_t request_uniq; + /* * NOTE: This is the dri1/ums dungeon, don't add stuff here. Your patch * will be rejected. Instead look for a better place. @@ -2287,6 +2289,9 @@ struct drm_i915_gem_request { */ u32 seqno; + /* Unique identifier which can be used for trace points & debug */ + uint32_t uniq; + /** Position in the ringbuffer of the start of the request */ u32 head; diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 21fce67..a632276 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -3008,7 +3008,8 @@ static void i915_gem_request_fence_value_str(struct fence *req_fence, req = container_of(req_fence, typeof(*req), fence); - snprintf(str, size, "%d [%d]", req->fence.seqno, req->seqno); + snprintf(str, size, "%d [%d:%d]", req->fence.seqno, req->uniq, + req->seqno); } static const struct fence_ops i915_gem_request_fops = { @@ -3085,6 +3086,7 @@ __i915_gem_request_alloc(struct intel_engine_cs *engine, req->i915 = dev_priv; req->engine = engine; + req->uniq = dev_priv->request_uniq++; req->ctx = ctx; i915_gem_context_reference(req->ctx); diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h index b7c7031..59a6266 100644 --- a/drivers/gpu/drm/i915/i915_trace.h +++ b/drivers/gpu/drm/i915/i915_trace.h @@ -458,6 +458,7 @@ TRACE_EVENT(i915_gem_ring_sync_to, __field(u32, dev) __field(u32, sync_from) __field(u32, sync_to) + __field(u32, uniq_to) __field(u32, seqno) ), @@ -465,13 +466,14 @@ TRACE_EVENT(i915_gem_ring_sync_to, __entry->dev = from->dev->primary->index; __entry->sync_from = from->id; __entry->sync_to = to_req->engine->id; + __entry->uniq_to = to_req->uniq; __entry->seqno = i915_gem_request_get_seqno(req); ), - TP_printk("dev=%u, sync-from=%u, sync-to=%u, seqno=%u", + TP_printk("dev=%u, sync-from=%u, sync-to=%u, seqno=%u, to_uniq=%u", __entry->dev, __entry->sync_from, __entry->sync_to, - __entry->seqno) + __entry->seqno, __entry->uniq_to) ); TRACE_EVENT(i915_gem_ring_dispatch, @@ -481,6 +483,7 @@ TRACE_EVENT(i915_gem_ring_dispatch, TP_STRUCT__entry( __field(u32, dev) __field(u32, ring) + __field(u32, uniq) __field(u32, seqno) __field(u32, flags) ), @@ -490,13 +493,15 @@ TRACE_EVENT(i915_gem_ring_dispatch, i915_gem_request_get_engine(req); __entry->dev = engine->dev->primary->index; __entry->ring = engine->id; + __entry->uniq = req->uniq; __entry->seqno = i915_gem_request_get_seqno(req); __entry->flags = flags; i915_trace_irq_get(engine, req); ), - TP_printk("dev=%u, ring=%u, seqno=%u, flags=%x", - __entry->dev, __entry->ring, __entry->seqno, __entry->flags) + TP_printk("dev=%u, ring=%u, uniq=%u, seqno=%u, flags=%x", + __entry->dev, __entry->ring, __entry->uniq, + __entry->seqno, __entry->flags) ); TRACE_EVENT(i915_gem_ring_flush, @@ -506,6 +511,7 @@ TRACE_EVENT(i915_gem_ring_flush, TP_STRUCT__entry( __field(u32, dev) __field(u32, ring) + __field(u32, uniq) __field(u32, invalidate) __field(u32, flush) ), @@ -513,12 +519,13 @@ TRACE_EVENT(i915_gem_ring_flush, TP_fast_assign( __entry->dev = req->engine->dev->primary->index; __entry->ring = req->engine->id; + __entry->uniq = req->uniq; __entry->invalidate = invalidate; __entry->flush = flush; ), - TP_printk("dev=%u, ring=%x, invalidate=%04x, flush=%04x", - __entry->dev, __entry->ring, + TP_printk("dev=%u, ring=%x, request=%u, invalidate=%04x, flush=%04x", + __entry->dev, __entry->ring, __entry->uniq, __entry->invalidate, __entry->flush) ); @@ -529,6 +536,7 @@ DECLARE_EVENT_CLASS(i915_gem_request, TP_STRUCT__entry( __field(u32, dev) __field(u32, ring) + __field(u32, uniq) __field(u32, seqno) ), @@ -537,11 +545,13 @@ DECLARE_EVENT_CLASS(i915_gem_request, i915_gem_request_get_engine(req); __entry->dev = engine->dev->primary->index; __entry->ring = engine->id; + __entry->uniq = req ? req->uniq : 0; __entry->seqno = i915_gem_request_get_seqno(req); ), - TP_printk("dev=%u, ring=%u, seqno=%u", - __entry->dev, __entry->ring, __entry->seqno) + TP_printk("dev=%u, ring=%u, uniq=%u, seqno=%u", + __entry->dev, __entry->ring, __entry->uniq, + __entry->seqno) ); DEFINE_EVENT(i915_gem_request, i915_gem_request_add, @@ -590,6 +600,7 @@ TRACE_EVENT(i915_gem_request_wait_begin, TP_STRUCT__entry( __field(u32, dev) __field(u32, ring) + __field(u32, uniq) __field(u32, seqno) __field(bool, blocking) ), @@ -605,13 +616,14 @@ TRACE_EVENT(i915_gem_request_wait_begin, i915_gem_request_get_engine(req); __entry->dev = engine->dev->primary->index; __entry->ring = engine->id; + __entry->uniq = req ? req->uniq : 0; __entry->seqno = i915_gem_request_get_seqno(req); __entry->blocking = mutex_is_locked(&engine->dev->struct_mutex); ), - TP_printk("dev=%u, ring=%u, seqno=%u, blocking=%s", - __entry->dev, __entry->ring, + TP_printk("dev=%u, ring=%u, uniq=%u, seqno=%u, blocking=%s", + __entry->dev, __entry->ring, __entry->uniq, __entry->seqno, __entry->blocking ? "yes (NB)" : "no") ); -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx