On Wed, Apr 20, 2016 at 04:47:35PM +0530, ankitprasad.r.sharma@xxxxxxxxx wrote:
> static int
> i915_gem_shmem_pread(struct drm_device *dev,
> struct drm_i915_gem_object *obj,
> @@ -656,6 +795,9 @@ i915_gem_shmem_pread(struct drm_device *dev,
> int needs_clflush = 0;
> struct sg_page_iter sg_iter;
>
> + if (!obj->base.filp)
> + return -ENODEV;
This is now:
if ((obj->ops->flags & I915_GEM_OBJECT_HAS_STRUCT_PAGE) == 0)
return -ENODEV;
> @@ -866,22 +1009,34 @@ i915_gem_gtt_pwrite_fast(struct drm_i915_private *i915,
> unsigned page_length = PAGE_SIZE - page_offset;
> page_length = remain < page_length ? remain : page_length;
> if (node.allocated) {
> - wmb();
> + wmb(); /* flush the write before we modify the GGTT */
> ggtt->base.insert_page(&ggtt->base,
> i915_gem_object_get_dma_address(obj, offset >> PAGE_SHIFT),
> node.start, I915_CACHE_NONE, 0);
> - wmb();
> + wmb(); /* flush modifications to the GGTT (insert_page) */
We might as delete this wmb(); then we don't even need to document it ;)
Hmm. On reflection, we can punt wmb() (from insert_page()) to the caller
as well as it is much clearer, so go back to patch 1 and remove both the
wmb() and chipset flushes.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
