So those subtests that require tiling don't cause unrelated subtests to be skipped. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@xxxxxxxxxxxxx> --- tests/kms_addfb_basic.c | 148 ++++++++++++++++++++++++------------------------ 1 file changed, 73 insertions(+), 75 deletions(-) diff --git a/tests/kms_addfb_basic.c b/tests/kms_addfb_basic.c index 64047303dea7..cdfcd179854e 100644 --- a/tests/kms_addfb_basic.c +++ b/tests/kms_addfb_basic.c @@ -160,73 +160,74 @@ static void pitch_tests(int fd) gem_close(fd, gem_bo); } - static void tiling_tests(int fd) { struct drm_mode_fb_cmd2 f = {}; - uint32_t tiled_x_bo; - uint32_t tiled_y_bo; + uint32_t tiled_x_bo = 0; + uint32_t tiled_y_bo = 0; f.width = 512; f.height = 512; f.pixel_format = DRM_FORMAT_XRGB8888; f.pitches[0] = 1024*4; - igt_fixture { - tiled_x_bo = igt_create_bo_with_dimensions(fd, 1024, 1024, - DRM_FORMAT_XRGB8888, LOCAL_I915_FORMAT_MOD_X_TILED, - 1024*4, NULL, NULL, NULL); - igt_assert(tiled_x_bo); - - tiled_y_bo = igt_create_bo_with_dimensions(fd, 1024, 1024, - DRM_FORMAT_XRGB8888, LOCAL_I915_FORMAT_MOD_Y_TILED, - 1024*4, NULL, NULL, NULL); - igt_assert(tiled_y_bo); + igt_subtest_group { + igt_fixture { + tiled_x_bo = igt_create_bo_with_dimensions(fd, 1024, 1024, + DRM_FORMAT_XRGB8888, LOCAL_I915_FORMAT_MOD_X_TILED, + 1024*4, NULL, NULL, NULL); + igt_assert(tiled_x_bo); + + tiled_y_bo = igt_create_bo_with_dimensions(fd, 1024, 1024, + DRM_FORMAT_XRGB8888, LOCAL_I915_FORMAT_MOD_Y_TILED, + 1024*4, NULL, NULL, NULL); + igt_assert(tiled_y_bo); + + gem_bo = igt_create_bo_with_dimensions(fd, 1024, 1024, + DRM_FORMAT_XRGB8888, 0, 0, NULL, NULL, NULL); + igt_assert(gem_bo); + } - gem_bo = igt_create_bo_with_dimensions(fd, 1024, 1024, - DRM_FORMAT_XRGB8888, 0, 0, NULL, NULL, NULL); - igt_assert(gem_bo); - } + f.pitches[0] = 1024*4; + igt_subtest("basic-X-tiled") { + f.handles[0] = tiled_x_bo; - f.pitches[0] = 1024*4; - igt_subtest("basic-X-tiled") { - f.handles[0] = tiled_x_bo; + igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f) == 0); + igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_RMFB, &f.fb_id) == 0); + f.fb_id = 0; + } - igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f) == 0); - igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_RMFB, &f.fb_id) == 0); - f.fb_id = 0; - } + igt_subtest("framebuffer-vs-set-tiling") { + f.handles[0] = gem_bo; - igt_subtest("framebuffer-vs-set-tiling") { - f.handles[0] = gem_bo; - - gem_set_tiling(fd, gem_bo, I915_TILING_X, 1024*4); - igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f) == 0); - igt_assert(__gem_set_tiling(fd, gem_bo, I915_TILING_X, 512*4) == -EBUSY); - igt_assert(__gem_set_tiling(fd, gem_bo, I915_TILING_X, 1024*4) == -EBUSY); - igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_RMFB, &f.fb_id) == 0); - f.fb_id = 0; - } + gem_set_tiling(fd, gem_bo, I915_TILING_X, 1024*4); + igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f) == 0); + igt_assert(__gem_set_tiling(fd, gem_bo, I915_TILING_X, 512*4) == -EBUSY); + igt_assert(__gem_set_tiling(fd, gem_bo, I915_TILING_X, 1024*4) == -EBUSY); + igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_RMFB, &f.fb_id) == 0); + f.fb_id = 0; + } - f.pitches[0] = 512*4; - igt_subtest("tile-pitch-mismatch") { - f.handles[0] = tiled_x_bo; + f.pitches[0] = 512*4; + igt_subtest("tile-pitch-mismatch") { + f.handles[0] = tiled_x_bo; - igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f) == -1 && - errno == EINVAL); - } + igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f) == -1 && + errno == EINVAL); + } - f.pitches[0] = 1024*4; - igt_subtest("basic-Y-tiled") { - f.handles[0] = tiled_y_bo; + f.pitches[0] = 1024*4; + igt_subtest("basic-Y-tiled") { + f.handles[0] = tiled_y_bo; - igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f) == -1 && - errno == EINVAL); - } + igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_ADDFB2, &f) == -1 && + errno == EINVAL); + } - igt_fixture { - gem_close(fd, tiled_x_bo); - gem_close(fd, tiled_y_bo); + igt_fixture { + gem_close(fd, tiled_x_bo); + gem_close(fd, tiled_y_bo); + } } } @@ -366,36 +367,33 @@ static void addfb25_tests(int fd) igt_assert(drmIoctl(fd, LOCAL_DRM_IOCTL_MODE_ADDFB2, &f) < 0 && errno == EINVAL); } - igt_subtest("addfb25-X-tiled-mismatch") { - gem_set_tiling(fd, gem_bo, I915_TILING_X, 1024*4); - igt_require_fb_modifiers(fd); - - f.modifier[0] = LOCAL_DRM_FORMAT_MOD_NONE; - igt_assert(drmIoctl(fd, LOCAL_DRM_IOCTL_MODE_ADDFB2, &f) < 0 && errno == EINVAL); - } - - igt_subtest("addfb25-X-tiled") { - gem_set_tiling(fd, gem_bo, I915_TILING_X, 1024*4); - igt_require_fb_modifiers(fd); + igt_subtest_group { + igt_fixture { + gem_set_tiling(fd, gem_bo, I915_TILING_X, 1024*4); + igt_require_fb_modifiers(fd); + } - f.modifier[0] = LOCAL_I915_FORMAT_MOD_X_TILED; - igt_assert(drmIoctl(fd, LOCAL_DRM_IOCTL_MODE_ADDFB2, &f) == 0); - igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_RMFB, &f.fb_id) == 0); - f.fb_id = 0; - } + igt_subtest("addfb25-X-tiled-mismatch") { + f.modifier[0] = LOCAL_DRM_FORMAT_MOD_NONE; + igt_assert(drmIoctl(fd, LOCAL_DRM_IOCTL_MODE_ADDFB2, &f) < 0 && errno == EINVAL); + } - igt_subtest("addfb25-framebuffer-vs-set-tiling") { - gem_set_tiling(fd, gem_bo, I915_TILING_X, 1024*4); - igt_require_fb_modifiers(fd); + igt_subtest("addfb25-X-tiled") { + f.modifier[0] = LOCAL_I915_FORMAT_MOD_X_TILED; + igt_assert(drmIoctl(fd, LOCAL_DRM_IOCTL_MODE_ADDFB2, &f) == 0); + igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_RMFB, &f.fb_id) == 0); + f.fb_id = 0; + } - f.modifier[0] = LOCAL_I915_FORMAT_MOD_X_TILED; - igt_assert(drmIoctl(fd, LOCAL_DRM_IOCTL_MODE_ADDFB2, &f) == 0); - igt_assert(__gem_set_tiling(fd, gem_bo, I915_TILING_X, 512*4) == -EBUSY); - igt_assert(__gem_set_tiling(fd, gem_bo, I915_TILING_X, 1024*4) == -EBUSY); - igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_RMFB, &f.fb_id) == 0); - f.fb_id = 0; + igt_subtest("addfb25-framebuffer-vs-set-tiling") { + f.modifier[0] = LOCAL_I915_FORMAT_MOD_X_TILED; + igt_assert(drmIoctl(fd, LOCAL_DRM_IOCTL_MODE_ADDFB2, &f) == 0); + igt_assert(__gem_set_tiling(fd, gem_bo, I915_TILING_X, 512*4) == -EBUSY); + igt_assert(__gem_set_tiling(fd, gem_bo, I915_TILING_X, 1024*4) == -EBUSY); + igt_assert(drmIoctl(fd, DRM_IOCTL_MODE_RMFB, &f.fb_id) == 0); + f.fb_id = 0; + } } - igt_fixture gem_close(fd, gem_bo); } -- 2.5.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx