Hi, Here's an updated series with comments addressed. It alsos gives VLV code the same treatment. Thanks, Ander Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Ander Conselvan de Oliveira (10): drm/i915: Set crtc_state->lane_count for HDMI drm/i915: Unduplicate CHV signal level code drm/i915: Unduplicate chv_data_lane_soft_reset() drm/i915: Unduplicate CHV phy-releated pre pll enabling code drm/i915: Unduplicate CHV pre-encoder enabling phy logic drm/i915: Undiplicate CHV encoders' post pll disable code drm/i915: Undiplicate VLV signal level code drm/i915: Unduplicate VLV phy pre pll enabling code drm/i915: Unduplicate pre encoder enabling phy code drm/i915: Move VLV HDMI lane reset work around logic to intel_dpio_phy.c drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_drv.h | 18 ++ drivers/gpu/drm/i915/intel_ddi.c | 4 +- drivers/gpu/drm/i915/intel_dp.c | 435 ++----------------------------- drivers/gpu/drm/i915/intel_dpio_phy.c | 470 ++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 5 + drivers/gpu/drm/i915/intel_hdmi.c | 356 +------------------------ 7 files changed, 538 insertions(+), 751 deletions(-) create mode 100644 drivers/gpu/drm/i915/intel_dpio_phy.c -- 2.4.11 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx