From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Here is the remainder of my DSI/DPLL series [1]. Everything else got merged already. The first patch in the series is the only one to lack an r-b. Tested on BYT FFRD8 only, BXT stuff is not tested. [1] https://lists.freedesktop.org/archives/intel-gfx/2016-March/089782.html Ville Syrjälä (5): drm/i915: Setup DPLL/DPLLMD for DSI too on VLV/CHV drm/i915: Compute DSI PLL parameters during .compute_config() drm/i915: Eliminate {vlv,bxt}_configure_dsi_pll() drm/i915: Hook up pfit for DSI drm/i915: Reject 'Center' scaling mode for eDP/DSI on GMCH platforms drivers/gpu/drm/i915/intel_display.c | 123 ++++++++++++++++++------------ drivers/gpu/drm/i915/intel_dp.c | 5 ++ drivers/gpu/drm/i915/intel_drv.h | 5 ++ drivers/gpu/drm/i915/intel_dsi.c | 113 ++++++++++++++++++++------- drivers/gpu/drm/i915/intel_dsi.h | 14 ++-- drivers/gpu/drm/i915/intel_dsi_pll.c | 144 +++++++++++++++++------------------ 6 files changed, 252 insertions(+), 152 deletions(-) -- 2.7.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
