On Fri, Apr 01, 2016 at 09:53:18PM +0300, ville.syrjala@xxxxxxxxxxxxxxx wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Once again ILK is unhappy if we clear out the LP1+ watermark levels > outright, and instead we must disable the levels we don't want while > still leaving the actual programmed watermark levels intact. > > Fixes underruns on the already enabled pipe when programming watermarks > while enabling the second pipe. > > Cc: Daniel Vetter <daniel.vetter@xxxxxxxx> > Cc: Matt Roper <matthew.d.roper@xxxxxxxxx> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93787 > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Reviewed-by: Patrik Jakobsson <patrik.jakobsson@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_pm.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 9bc9c25423e9..a7fd5d464838 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -2483,7 +2483,7 @@ static void ilk_wm_merge(struct drm_device *dev, > /* ILK/SNB/IVB: LP1+ watermarks only w/ single pipe */ > if ((INTEL_INFO(dev)->gen <= 6 || IS_IVYBRIDGE(dev)) && > config->num_pipes_active > 1) > - return; > + last_enabled_level = 0; > > /* ILK: FBC WM must be disabled always */ > merged->fbc_wm_enabled = INTEL_INFO(dev)->gen >= 6; > -- > 2.7.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Intel Sweden AB Registered Office: Knarrarnasgatan 15, 164 40 Kista, Stockholm, Sweden Registration Number: 556189-6027 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
