Pasted below are Bat results (don't seem to get an email from Bat anymore). > Series 4282v3 drm/i915: implement WaClearTdlStateAckDirtyBits > http://patchwork.freedesktop.org/api/1.0/series/4282/revisions/3/mbox/ > > Test kms_flip: > Subgroup basic-flip-vs-wf_vblank: > pass -> DMESG-WARN (hsw-brixbox) device suspended during HW access, see https://bugs.freedesktop.org/show_bug.cgi?id=94349 > Subgroup basic-plain-flip: > pass -> DMESG-WARN (snb-x220t) device suspended during HW access, see https://bugs.freedesktop.org/show_bug.cgi?id=94349 > dmesg-warn -> PASS (bdw-ultra) > Test kms_pipe_crc_basic: > Subgroup read-crc-pipe-c-frame-sequence: > pass -> SKIP (hsw-brixbox) No connector found for pipe 2. Also seen in ci-drm-1156. See https://bugs.freedesktop.org/show_bug.cgi?id=93769 > Subgroup suspend-read-crc-pipe-c: > dmesg-warn -> PASS (bsw-nuc-2) > Test pm_rpm: > Subgroup basic-pci-d3-state: > pass -> DMESG-WARN (snb-dellxps) device suspended during HW access, see https://bugs.freedesktop.org/show_bug.cgi?id=94349 > pass -> DMESG-WARN (byt-nuc) Unclaimed Access detected, see https://bugs.freedesktop.org/show_bug.cgi?id=94164. Note priority is not "highest" > Subgroup basic-rte: > dmesg-warn -> PASS (snb-x220t) > pass -> DMESG-WARN (bsw-nuc-2) Unclaimed Access detected - , see https://bugs.freedesktop.org/show_bug.cgi?id=94164. Note priority is not "highest" > > dmesg-warn -> PASS (snb-dellxps) > dmesg-warn -> PASS (byt-nuc) UNSTABLE bdw-nuci7 total:192 pass:180 dwarn:0 dfail:0 fail:0 skip:12 bdw-ultra total:192 pass:171 dwarn:0 dfail:0 fail:0 skip:21 bsw-nuc-2 total:192 pass:154 dwarn:1 dfail:0 fail:0 skip:37 byt-nuc total:192 pass:156 dwarn:1 dfail:0 fail:0 skip:35 hsw-brixbox total:192 pass:168 dwarn:1 dfail:0 fail:0 skip:23 ilk-hp8440p total:192 pass:128 dwarn:1 dfail:0 fail:0 skip:63 ivb-t430s total:192 pass:167 dwarn:0 dfail:0 fail:0 skip:25 skl-i5k-2 total:192 pass:169 dwarn:0 dfail:0 fail:0 skip:23 skl-i7k-2 total:192 pass:169 dwarn:0 dfail:0 fail:0 skip:23 snb-dellxps total:192 pass:157 dwarn:1 dfail:0 fail:0 skip:34 snb-x220t total:192 pass:157 dwarn:1 dfail:0 fail:1 skip:33 Results at /archive/results/CI_IGT_test/Patchwork_1663/ 4b39223f6e3bef4dfa678f7239dcd87c38e20e96 drm-intel-nightly: 2016y-03m-21d-18h-43m-18s UTC integration manifest 8c4bb61d48749011ec44eaa2f908c1f4d48b601c drm/i915: implement WaClearTdlStateAckDirtyBits Tim Gore Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ > -----Original Message----- > From: Gore, Tim > Sent: Monday, March 21, 2016 2:37 PM > To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: arun.siluvery@xxxxxxxxxxxxxxx; Gore, Tim > Subject: [PATCH v4] drm/i915: implement WaClearTdlStateAckDirtyBits > > From: Tim Gore <tim.gore@xxxxxxxxx> > > This is to fix a GPU hang seen with mid thread pre-emption and pooled EUs. > > v2. Use IS_BXT_REVID instead of IS_BROXTON and INTEL_REVID > > v3. And use correct type for register addresses > > Signed-off-by: Tim Gore <tim.gore@xxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_reg.h | 12 ++++++++++++ > drivers/gpu/drm/i915/intel_lrc.c | 19 +++++++++++++++++++ > 2 files changed, 31 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h > b/drivers/gpu/drm/i915/i915_reg.h index 06fb589..c54190b 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -1783,6 +1783,18 @@ enum skl_disp_power_wells { > #define GEN9_IZ_HASHING_MASK(slice) (0x3 << > ((slice) * 2)) > #define GEN9_IZ_HASHING(slice, val) ((val) << > ((slice) * 2)) > > +/* WaClearTdlStateAckDirtyBits */ > +#define GEN8_STATE_ACK _MMIO(0x20F0) > +#define GEN9_STATE_ACK_SLICE1 _MMIO(0x20F8) > +#define GEN9_STATE_ACK_SLICE2 _MMIO(0x2100) > +#define GEN9_STATE_ACK_TDL0 (1 << 12) > +#define GEN9_STATE_ACK_TDL1 (1 << 13) > +#define GEN9_STATE_ACK_TDL2 (1 << 14) > +#define GEN9_STATE_ACK_TDL3 (1 << 15) > +#define GEN9_SUBSLICE_TDL_ACK_BITS \ > + (GEN9_STATE_ACK_TDL3 | GEN9_STATE_ACK_TDL2 | \ > + GEN9_STATE_ACK_TDL1 | GEN9_STATE_ACK_TDL0) > + > #define GFX_MODE _MMIO(0x2520) > #define GFX_MODE_GEN7 _MMIO(0x229c) > #define RING_MODE_GEN7(ring) _MMIO((ring)->mmio_base+0x29c) > diff --git a/drivers/gpu/drm/i915/intel_lrc.c > b/drivers/gpu/drm/i915/intel_lrc.c > index 3a23b95..b6dcd4d 100644 > --- a/drivers/gpu/drm/i915/intel_lrc.c > +++ b/drivers/gpu/drm/i915/intel_lrc.c > @@ -1450,6 +1450,25 @@ static int gen9_init_perctx_bb(struct > intel_engine_cs *engine, > wa_ctx_emit(batch, index, MI_NOOP); > } > > + /* WaClearTdlStateAckDirtyBits:bxt */ > + if (IS_BXT_REVID(dev, 0, BXT_REVID_B0)) { > + wa_ctx_emit(batch, index, MI_LOAD_REGISTER_IMM(4)); > + > + wa_ctx_emit_reg(batch, index, GEN8_STATE_ACK); > + wa_ctx_emit(batch, index, > +_MASKED_BIT_DISABLE(GEN9_SUBSLICE_TDL_ACK_BITS)); > + > + wa_ctx_emit_reg(batch, index, GEN9_STATE_ACK_SLICE1); > + wa_ctx_emit(batch, index, > +_MASKED_BIT_DISABLE(GEN9_SUBSLICE_TDL_ACK_BITS)); > + > + wa_ctx_emit_reg(batch, index, GEN9_STATE_ACK_SLICE2); > + wa_ctx_emit(batch, index, > +_MASKED_BIT_DISABLE(GEN9_SUBSLICE_TDL_ACK_BITS)); > + > + wa_ctx_emit_reg(batch, index, GEN7_ROW_CHICKEN2); > + /* dummy write to CS, mask bits are 0 to ensure the register > is not modified */ > + wa_ctx_emit(batch, index, 0x0); > + wa_ctx_emit(batch, index, MI_NOOP); > + } > + > /* WaDisableCtxRestoreArbitration:skl,bxt */ > if (IS_SKL_REVID(dev, 0, SKL_REVID_D0) || > IS_BXT_REVID(dev, 0, BXT_REVID_A1)) > -- > 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
