On Mon, Mar 21, 2016 at 12:30:54PM +0200, Jani Nikula wrote: > On Fri, 18 Mar 2016, Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> wrote: > > On Fri, Mar 18, 2016 at 06:12:35PM +0200, Ville Syrjälä wrote: > >> On Fri, Mar 18, 2016 at 04:13:45PM +0200, Ville Syrjälä wrote: > >> > On Thu, Mar 17, 2016 at 11:40:45AM -0400, Lyude wrote: > >> > > - drm_dp_dpcd_read(aux, DP_DPCD_REV, buffer, 1); > >> > > >> > NAK > >> > > >> > If people keep intentionally breaking my shit I'm going to become > >> > really grumpy soon. > >> > >> Oh, and just in case someone wants to come up with a better kludge, > >> I just spent a few minutes analyzing the behavior of this crappy > >> monitor a. > >> > >> What happens is that when the monitor is fully powered up (LED is blue) > >> things are fine. After the monitor goes to sleep (LED turns orange) > >> the first DPCD read will produce garbage. Further DPCD reads are fine, > >> even if I wait a significant amount of time between the reads, as long > >> as the monitor didn't do a power on->off cycle in between. So it looks > >> like it's always just the first read after power down that gets > >> corrupted. > >> > >> Now I think I'll go and test how writes behave, assuming I can find a > >> decently sized chunk of DPCD address space I can write. And maybe I > >> should also try i2c-over-aux... > > > > The first DPCD write after powerdown also got corrupted. But i2c-over-aux > > seems unaffected for whatever reason. > > Did the display go to sleep on its own, or did we do something? In > particular, does DPCD DP_SET_POWER register play a role? What if we skip > writing D3 to it? What if we do that write as the first thing (every > time)? User pressing any of the buttons on the monitor is enough to wake it, and after a short timeout it will power down on its own, leading to the corrupted access. Keeping DP_SET_POWER at D0 doesn't change anything. -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
