On Wed, 16 Mar 2016, Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> wrote: > On Wed, Mar 16, 2016 at 06:06:58PM +0200, Jani Nikula wrote: >> drivers/gpu/drm/i915/intel_dpll_mgr.c:1200:32: warning: Using plain integer as NULL pointer >> >> Fixes: 304b65cbdc8d ("drm/i915: Move SKL/KLB pll selection logic to intel_dpll_mgr.c") >> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx> > > Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Pushed to drm-intel-next-queued, thanks for the review. The CI fails are unrelated. BR, Jani. > >> --- >> drivers/gpu/drm/i915/intel_dpll_mgr.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c >> index 74d5aecc0be5..e53d57c39056 100644 >> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c >> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c >> @@ -1197,7 +1197,7 @@ skl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state, >> ctrl1 |= DPLL_CTRL1_HDMI_MODE(0); >> >> if (!skl_ddi_calculate_wrpll(clock * 1000, &wrpll_params)) >> - return false; >> + return NULL; >> >> cfgcr1 = DPLL_CFGCR1_FREQ_ENABLE | >> DPLL_CFGCR1_DCO_FRACTION(wrpll_params.dco_fraction) | >> -- >> 2.1.4 >> >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx