On Tue, 15 Mar 2016, ville.syrjala@xxxxxxxxxxxxxxx wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > pgm_ratios in stored as a register value in pipe config, so let's dump > this one as hex as well. > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_display.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index d0b7fc85bc3a..ecda7e28ab9a 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -12722,7 +12722,7 @@ intel_pipe_config_compare(struct drm_device *dev, > PIPE_CONF_CHECK_X(gmch_pfit.control); > /* pfit ratios are autocomputed by the hw on gen4+ */ > if (INTEL_INFO(dev)->gen < 4) > - PIPE_CONF_CHECK_I(gmch_pfit.pgm_ratios); > + PIPE_CONF_CHECK_X(gmch_pfit.pgm_ratios); > PIPE_CONF_CHECK_X(gmch_pfit.lvds_border_bits); > > if (!adjust) { -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx