For BXT, Polarity of PORT_PLL_REF_SEL is reversed in its description in Bspec. This bit should be set for "Non-SSC". Signed-off-by: Dongwon Kim <dongwon.kim@xxxxxxxxx> --- drivers/gpu/drm/i915/intel_dpll_mgr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c index 4b636c4..d55b308 100644 --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c @@ -1285,7 +1285,7 @@ static void bxt_ddi_pll_enable(struct drm_i915_private *dev_priv, enum port port = (enum port)pll->id; /* 1:1 port->PLL mapping */ temp = I915_READ(BXT_PORT_PLL_ENABLE(port)); - temp &= ~PORT_PLL_REF_SEL; + temp |= PORT_PLL_REF_SEL; /* Non-SSC reference */ I915_WRITE(BXT_PORT_PLL_ENABLE(port), temp); -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
