On Mon, Mar 14, 2016 at 10:55:41AM +0200, Ander Conselvan de Oliveira wrote: > A previous patche made ironlake_get_refclk() very simple, so merge > it into its only caller. Again I'd like to keep the pch and gmch code as similar as possible. So could do the same for the gmch code. I already had a patch in my lvds_downclock branch that moved some of the gmch platform differences out from i9xx_get_refclk() into the caller, so I guess might as well move the whole thing I suppose. > > Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_display.c | 24 ++++++++---------------- > 1 file changed, 8 insertions(+), 16 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index e7d6584..07b5244 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -8589,21 +8589,6 @@ void intel_init_pch_refclk(struct drm_device *dev) > lpt_init_pch_refclk(dev); > } > > -static int ironlake_get_refclk(struct intel_crtc_state *crtc_state) > -{ > - struct drm_device *dev = crtc_state->base.crtc->dev; > - struct drm_i915_private *dev_priv = dev->dev_private; > - > - if (intel_pipe_will_have_type(crtc_state, INTEL_OUTPUT_LVDS) && > - intel_panel_use_ssc(dev_priv)) { > - DRM_DEBUG_KMS("using SSC reference clock of %d kHz\n", > - dev_priv->vbt.lvds_ssc_freq); > - return dev_priv->vbt.lvds_ssc_freq; > - } > - > - return 120000; > -} > - > static void ironlake_set_pipeconf(struct drm_crtc *crtc) > { > struct drm_i915_private *dev_priv = crtc->dev->dev_private; > @@ -8775,7 +8760,14 @@ static bool ironlake_compute_clocks(struct drm_crtc *crtc, > const intel_limit_t *limit; > bool ret; > > - refclk = ironlake_get_refclk(crtc_state); > + if (intel_pipe_will_have_type(crtc_state, INTEL_OUTPUT_LVDS) && > + intel_panel_use_ssc(dev_priv)) { > + DRM_DEBUG_KMS("using SSC reference clock of %d kHz\n", > + dev_priv->vbt.lvds_ssc_freq); > + refclk = dev_priv->vbt.lvds_ssc_freq; > + } else { > + refclk = 120000; > + } > > /* > * Returns a set of divisors for the desired target clock with the given > -- > 2.4.3 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx