We are procuring the DVI-single-link cable, as we don't have one with us. Sonika tested the Dual link cable, and that was working well. We can do two things here: - Add the gen check, which will allow the live_status check only for VLV and + platforms, others will go as it is. - Wait for some more time, get the cable and try to rep and fix the issue. Regards Shashank -----Original Message----- From: Jindal, Sonika Sent: Wednesday, March 09, 2016 11:23 AM To: Chris Wilson; Sharma, Shashank Cc: intel-gfx@xxxxxxxxxxxxxxxxxxxxx Subject: RE: [PATCH] drm/i915: Check live status before reading edid +Shashank Shashank was planning to give a patch to bypass live status checks for older platforms. Regards, Sonika -----Original Message----- From: Chris Wilson [mailto:chris@xxxxxxxxxxxxxxxxxx] Sent: Wednesday, March 9, 2016 2:34 AM To: Jindal, Sonika <sonika.jindal@xxxxxxxxx> Cc: intel-gfx@xxxxxxxxxxxxxxxxxxxxx Subject: Re: [PATCH] drm/i915: Check live status before reading edid On Tue, Sep 15, 2015 at 09:44:20AM +0530, Sonika Jindal wrote: > The Bspec is very clear that Live status must be checked about before > trying to read EDID over DDC channel. This patch makes sure that HDMI > EDID is read only when live status is up. > > The live status doesn't seem to perform very consistent across various > platforms when tested with different monitors. The reason behind that > is some monitors are late to provide right voltage to set live_status up. > So, after getting the interrupt, for a small duration, live status reg > fluctuates, and then settles down showing the correct staus. > > This is explained here in, in a rough way: > HPD line ________________ > |\ T1 = Monitor Hotplug causing IRQ > | \______________________________________ > | | > | | > | | T2 = Live status is stable > | | _____________________________________ > | | /| > Live status _____________|_|/ | > | | | > | | | > | | | > T0 T1 T2 > > (Between T1 and T2 Live status fluctuates or can be even low, > depending on the monitor) > > After several experiments, we have concluded that a max delay of 30ms > is enough to allow the live status to settle down with most of the > monitors. This total delay of 30ms has been split into a resolution of > 3 retries of 10ms each, for the better cases. > > This delay is kept at 30ms, keeping in consideration that, HDCP > compliance expect the HPD handler to respond a plug out in 100ms, by disabling port. This is a regression-fest. Revert with stable@? -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
