From: Tom O'Rourke <Tom.O'Rourke@xxxxxxxxx>
On platforms with SLPC support: call intel_slpc_*()
functions from corresponding intel_*_gt_powersave()
functions; and do not use rps functions.
v2: return void instead of ignored error code (Paulo)
enable/disable RC6 in SLPC flows (Sagar)
replace HAS_SLPC() use with intel_slpc_enabled()
or intel_slpc_active() (Paulo)
Signed-off-by: Tom O'Rourke <Tom.O'Rourke@xxxxxxxxx>
---
drivers/gpu/drm/i915/Makefile | 5 ++--
drivers/gpu/drm/i915/intel_drv.h | 4 +++
drivers/gpu/drm/i915/intel_guc.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 36 ++++++++++++++++++-------
drivers/gpu/drm/i915/intel_slpc.c | 56 +++++++++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_slpc.h | 35 ++++++++++++++++++++++++
6 files changed, 126 insertions(+), 11 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_slpc.c
create mode 100644 drivers/gpu/drm/i915/intel_slpc.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 0851de07..92b378b 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -41,8 +41,9 @@ i915-y += i915_cmd_parser.o \
intel_uncore.o
# general-purpose microcontroller (GuC) support
-i915-y += intel_guc_loader.o \
- i915_guc_submission.o
+i915-y += i915_guc_submission.o \
+ intel_guc_loader.o \
+ intel_slpc.o
# autogenerated null render state
i915-y += intel_renderstate_gen6.o \
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 3daf1e3..11e7d66 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1587,6 +1587,10 @@ void chv_phy_powergate_lanes(struct intel_encoder *encoder,
bool chv_phy_powergate_ch(struct drm_i915_private *dev_priv, enum dpio_phy phy,
enum dpio_channel ch, bool override);
+static inline int intel_slpc_active(struct drm_device *dev)
+{
+ return 0;
+}
/* intel_pm.c */
void intel_init_clock_gating(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index 298e243..417cc82 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -26,6 +26,7 @@
#include "intel_guc_fwif.h"
#include "i915_guc_reg.h"
+#include "intel_slpc.h"
struct i915_guc_client {
struct drm_i915_gem_object *client_obj;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index f65e841..9820a77 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6178,7 +6178,9 @@ void intel_init_gt_powersave(struct drm_device *dev)
intel_runtime_pm_get(dev_priv);
}
- if (IS_CHERRYVIEW(dev))
+ if (intel_slpc_enabled())
+ intel_slpc_init(dev);
+ else if (IS_CHERRYVIEW(dev))
cherryview_init_gt_powersave(dev);
else if (IS_VALLEYVIEW(dev))
valleyview_init_gt_powersave(dev);
@@ -6188,7 +6190,9 @@ void intel_cleanup_gt_powersave(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
- if (IS_CHERRYVIEW(dev))
+ if (intel_slpc_active(dev))
+ intel_slpc_cleanup(dev);
+ else if (IS_CHERRYVIEW(dev))
return;
else if (IS_VALLEYVIEW(dev))
valleyview_cleanup_gt_powersave(dev);
@@ -6221,17 +6225,24 @@ void intel_suspend_gt_powersave(struct drm_device *dev)
if (INTEL_INFO(dev)->gen < 6)
return;
- gen6_suspend_rps(dev);
+ if (intel_slpc_active(dev)) {
+ intel_slpc_suspend(dev);
+ } else {
+ gen6_suspend_rps(dev);
- /* Force GPU to min freq during suspend */
- gen6_rps_idle(dev_priv);
+ /* Force GPU to min freq during suspend */
+ gen6_rps_idle(dev_priv);
+ }
}
void intel_disable_gt_powersave(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
- if (IS_IRONLAKE_M(dev)) {
+ if (intel_slpc_active(dev)) {
+ intel_slpc_disable(dev);
+ gen9_disable_rps(dev);
+ } else if (IS_IRONLAKE_M(dev)) {
ironlake_disable_drps(dev);
} else if (INTEL_INFO(dev)->gen >= 6) {
intel_suspend_gt_powersave(dev);
@@ -6302,7 +6313,10 @@ void intel_enable_gt_powersave(struct drm_device *dev)
if (intel_vgpu_active(dev))
return;
- if (IS_IRONLAKE_M(dev)) {
+ if (intel_slpc_active(dev)) {
+ gen9_enable_rc6(dev);
+ intel_slpc_enable(dev);
+ } else if (IS_IRONLAKE_M(dev)) {
ironlake_enable_drps(dev);
mutex_lock(&dev->struct_mutex);
intel_init_emon(dev);
@@ -6333,8 +6347,12 @@ void intel_reset_gt_powersave(struct drm_device *dev)
if (INTEL_INFO(dev)->gen < 6)
return;
- gen6_suspend_rps(dev);
- dev_priv->rps.enabled = false;
+ if (intel_slpc_active(dev)) {
+ intel_slpc_reset(dev);
+ } else {
+ gen6_suspend_rps(dev);
+ dev_priv->rps.enabled = false;
+ }
}
static void ibx_init_clock_gating(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/intel_slpc.c b/drivers/gpu/drm/i915/intel_slpc.c
new file mode 100644
index 0000000..474fac0
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_slpc.c
@@ -0,0 +1,56 @@
+/*
+ * Copyright © 2015 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+#include <linux/firmware.h>
+#include "i915_drv.h"
+#include "intel_guc.h"
+
+void intel_slpc_init(struct drm_device *dev)
+{
+ return;
+}
+
+void intel_slpc_cleanup(struct drm_device *dev)
+{
+ return;
+}
+
+void intel_slpc_suspend(struct drm_device *dev)
+{
+ return;
+}
+
+void intel_slpc_disable(struct drm_device *dev)
+{
+ return;
+}
+
+void intel_slpc_enable(struct drm_device *dev)
+{
+ return;
+}
+
+void intel_slpc_reset(struct drm_device *dev)
+{
+ return;
+}
diff --git a/drivers/gpu/drm/i915/intel_slpc.h b/drivers/gpu/drm/i915/intel_slpc.h
new file mode 100644
index 0000000..6cfadb3
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_slpc.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright © 2015 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+#ifndef _INTEL_SLPC_H_
+#define _INTEL_SLPC_H_
+
+/* intel_slpc.c */
+void intel_slpc_init(struct drm_device *dev);
+void intel_slpc_cleanup(struct drm_device *dev);
+void intel_slpc_suspend(struct drm_device *dev);
+void intel_slpc_disable(struct drm_device *dev);
+void intel_slpc_enable(struct drm_device *dev);
+void intel_slpc_reset(struct drm_device *dev);
+
+#endif
--
1.9.1
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