For dual link panel scenarios there are new fileds added in the VBT which indicate on which port the PWM cntrl and CABC ON/OFF commands needs to be sent. v2: Moving the comment to intel_dsi.h(Jani) Cc: Jani Nikula <jani.nikula@xxxxxxxxx> Cc: Daniel Vetter <daniel.vetter@xxxxxxxxx> Cc: Yetunde Adebisi <yetundex.adebisi@xxxxxxxxx> Signed-off-by: Deepak M <m.deepak@xxxxxxxxx> --- drivers/gpu/drm/i915/intel_bios.c | 10 ++++++++++ drivers/gpu/drm/i915/intel_bios.h | 5 ++++- drivers/gpu/drm/i915/intel_dsi.h | 9 +++++++++ 3 files changed, 23 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c index bf62a19..4f5c0df 100644 --- a/drivers/gpu/drm/i915/intel_bios.c +++ b/drivers/gpu/drm/i915/intel_bios.c @@ -747,6 +747,16 @@ parse_mipi_config(struct drm_i915_private *dev_priv, return; } + /* + * These fileds are introduced from the VBT version 197 onwards, + * so making sure that these bits are set zero in the pervious + * versions. + */ + if (dev_priv->vbt.dsi.config->dual_link && bdb->version < 197) { + dev_priv->vbt.dsi.config->dl_cabc_port = 0; + dev_priv->vbt.dsi.config->pwm_bkl_ctrl = 0; + } + /* We have mandatory mipi config blocks. Initialize as generic panel */ dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; } diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h index 350d4e0..8f295fd 100644 --- a/drivers/gpu/drm/i915/intel_bios.h +++ b/drivers/gpu/drm/i915/intel_bios.h @@ -846,7 +846,10 @@ struct mipi_config { u16 dual_link:2; u16 lane_cnt:2; u16 pixel_overlap:3; - u16 rsvd3:9; + u16 rgb_flip:1; + u16 dl_cabc_port:2; + u16 pwm_bkl_ctrl:2; + u16 rsvd3:4; u16 rsvd4; diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h index de7be7f..6dfa0e3 100644 --- a/drivers/gpu/drm/i915/intel_dsi.h +++ b/drivers/gpu/drm/i915/intel_dsi.h @@ -74,6 +74,15 @@ struct intel_dsi { u8 escape_clk_div; u8 dual_link; + + /* + * Below field will inform us on which port the panel blk_cntrl + * and CABC ON/OFF commands needs to be sent in case of dual link + * panels + */ + u8 bkl_dcs_ports; + u8 pwm_blk_ctrl; + u8 pixel_overlap; u32 port_bits; u32 bw_timer; -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx