On Thu, Mar 03, 2016 at 10:51:23AM +0200, Jani Nikula wrote:
> On Wed, 02 Mar 2016, ville.syrjala@xxxxxxxxxxxxxxx wrote:
> > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> >
> > Currently we assume that hrawclk is 200MHz on VLV/CHV. That should
> > be true always, but just to avoid such asumptions we can read out the
> > actual frequency from CCK.
>
> Okay, so I don't want to spend forever looking for the spec section
> where I can verify this... please just pinpoint me the location. ;)
I've asked Imre to have a look at this since he should have all the
docs around I think, so you don't have to if you don't want to
If you do want to dig at it you'll want to look at the
VLV/CHV Display Cluster HAS and the VLV North Clock HAS/CHV Clock HAS.
>
> And whenever I see "that should be true always", I feel like there
> should be a WARN_ON(*gasp* it's not true this time!)...
I guess we could, but at least for the places where we use this, it
wouldn't actually matter if it's not true.
>
> BR,
> Jani.
>
>
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 1 +
> > drivers/gpu/drm/i915/intel_display.c | 3 ++-
> > 2 files changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index 71abf5725495..c4606c7ad8d6 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -786,6 +786,7 @@ enum skl_disp_power_wells {
> > #define DSI_PLL_M1_DIV_MASK (0x1ff << 0)
> > #define CCK_CZ_CLOCK_CONTROL 0x62
> > #define CCK_DISPLAY_CLOCK_CONTROL 0x6b
> > +#define CCK_DISPLAY_REF_CLOCK_CONTROL 0x6c
> > #define CCK_TRUNK_FORCE_ON (1 << 17)
> > #define CCK_TRUNK_FORCE_OFF (1 << 16)
> > #define CCK_FREQUENCY_STATUS (0x1f << 8)
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 330528c1fb28..f5a757bec3f7 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -178,7 +178,8 @@ intel_pch_rawclk(struct drm_i915_private *dev_priv)
> > static int
> > intel_vlv_hrawclk(struct drm_i915_private *dev_priv)
> > {
> > - return 200000;
> > + return vlv_get_cck_clock_hpll(dev_priv, "hrawclk",
> > + CCK_DISPLAY_REF_CLOCK_CONTROL);
> > }
> >
> > static int
>
> --
> Jani Nikula, Intel Open Source Technology Center
--
Ville Syrjälä
Intel OTC
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