On 02/18/2016 06:27 AM, John.C.Harrison@xxxxxxxxx wrote: > From: John Harrison <John.C.Harrison@xxxxxxxxx> > > When the watchdog resets the GPU, all interrupts get disabled despite > the reference count remaining. As the scheduler probably had > interrupts enabled during the reset (it would have been waiting for > the bad batch to complete), it must be poked to tell it that the > interrupt has been disabled. > > v5: New patch in series. > > For: VIZ-1587 > Signed-off-by: John Harrison <John.C.Harrison@xxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_gem.c | 2 ++ > drivers/gpu/drm/i915/i915_scheduler.c | 11 +++++++++++ > drivers/gpu/drm/i915/i915_scheduler.h | 1 + > 3 files changed, 14 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > index d946f53..d7f7f7a 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -3248,6 +3248,8 @@ static void i915_gem_reset_ring_cleanup(struct drm_i915_private *dev_priv, > buffer->last_retired_head = buffer->tail; > intel_ring_update_space(buffer); > } > + > + i915_scheduler_reset_cleanup(ring); > } > > void i915_gem_reset(struct drm_device *dev) > diff --git a/drivers/gpu/drm/i915/i915_scheduler.c b/drivers/gpu/drm/i915/i915_scheduler.c > index 8130a9c..4f25bf2 100644 > --- a/drivers/gpu/drm/i915/i915_scheduler.c > +++ b/drivers/gpu/drm/i915/i915_scheduler.c > @@ -778,6 +778,17 @@ void i915_scheduler_clean_node(struct i915_scheduler_queue_entry *node) > } > } > > +void i915_scheduler_reset_cleanup(struct intel_engine_cs *ring) > +{ > + struct drm_i915_private *dev_priv = ring->dev->dev_private; > + struct i915_scheduler *scheduler = dev_priv->scheduler; > + > + if (scheduler->flags[ring->id] & i915_sf_interrupts_enabled) { > + ring->irq_put(ring); > + scheduler->flags[ring->id] &= ~i915_sf_interrupts_enabled; > + } > +} > + So I guess these flags are also protected by the struct_mutex? If so, I guess it looks ok. Reviewed-by: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx> _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx