On Mon, Feb 22, 2016 at 02:18:08PM +0000, Lionel Landwerlin wrote:
> Implement Daniel Stone's recommendation to not read registers to infer
> the hardware's state.
>
> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@xxxxxxxxx>
Do we need to ensure that software and hardware state are synchronized
at startup? A boot firmware might have set it to something different
before our driver starts up; if we use 'fastboot' then we might not do
any modesets and might wind up with 0 (8BIT) in our state variable, but
something else actually programmed into the hardware.
Matt
> ---
> drivers/gpu/drm/i915/intel_color.c | 7 +++++--
> drivers/gpu/drm/i915/intel_drv.h | 3 +++
> 2 files changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c
> index cce0155..ba27ce2 100644
> --- a/drivers/gpu/drm/i915/intel_color.c
> +++ b/drivers/gpu/drm/i915/intel_color.c
> @@ -126,6 +126,8 @@ static void haswell_load_luts(struct drm_crtc *crtc)
> struct drm_device *dev = crtc->dev;
> struct drm_i915_private *dev_priv = dev->dev_private;
> struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> + struct intel_crtc_state *intel_crtc_state =
> + to_intel_crtc_state(crtc->state);
> bool reenable_ips = false;
>
> /*
> @@ -133,11 +135,12 @@ static void haswell_load_luts(struct drm_crtc *crtc)
> * GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled.
> */
> if (IS_HASWELL(dev) && intel_crtc->config->ips_enabled &&
> - ((I915_READ(GAMMA_MODE(intel_crtc->pipe)) & GAMMA_MODE_MODE_MASK) ==
> - GAMMA_MODE_MODE_SPLIT)) {
> + (intel_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)) {
> hsw_disable_ips(intel_crtc);
> reenable_ips = true;
> }
> +
> + intel_crtc_state->gamma_mode = GAMMA_MODE_MODE_8BIT;
> I915_WRITE(GAMMA_MODE(intel_crtc->pipe), GAMMA_MODE_MODE_8BIT);
>
> i9xx_load_luts(crtc);
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 40fc486..9742d5b 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -517,6 +517,9 @@ struct intel_crtc_state {
> struct skl_pipe_wm skl;
> } optimal;
> } wm;
> +
> + /* Gamma mode programmed on the pipe */
> + uint32_t gamma_mode;
> };
>
> struct vlv_wm_state {
> --
> 2.7.0
>
> _______________________________________________
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> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
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