On 18/02/2016 14:49, Chris Wilson wrote:
On Thu, Feb 18, 2016 at 02:24:06PM +0000, John.C.Harrison@xxxxxxxxx wrote:
From: John Harrison <John.C.Harrison@xxxxxxxxx>
The fence object used inside the request structure requires a sequence
number. Although this is not used by the i915 driver itself, it could
potentially be used by non-i915 code if the fence is passed outside of
the driver. This is the intention as it allows external kernel drivers
and user applications to wait on batch buffer completion
asynchronously via the dma-buff fence API.
To ensure that such external users are not confused by strange things
happening with the seqno, this patch adds in a per context timeline
that can provide a guaranteed in-order seqno value for the fence. This
is safe because the scheduler will not re-order batch buffers within a
context - they are considered to be mutually dependent.
This is still nonsense. Just implement per-context seqno.
If you already have a set of patches to implement per-context seqno then
let's get them merged. Otherwise, that is follow up work to be done once
the scheduler has landed. There has already been too much churn and
delay. So the decision is to get the scheduler in as soon as possible
and any 'could do better' issues should be logged for follow up work.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
