On pe, 2016-02-19 at 18:41 +0200, ville.syrjala@xxxxxxxxxxxxxxx wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > After we've told the irq code we don't want to handle display irqs > anymore, we must make sure any display irq handling already > kicked off has finished before we actually turn off the power well. > > I wouldn't expect PIPESTAT based interrupts to occur anymore since > vblanks/page flips/gmbus/etc should all be quiescent at this point. > But at least hotplug interrupts could still occur. Hotplug > interrupts may also kick off the workqueue based hotplug processing, > but that code should take the required power domain references > itself, so there shouldn't be any need to synchronize with the > hotplug processing from the power well code. > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Reviewed-by: Imre Deak <imre.deak@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_runtime_pm.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c > b/drivers/gpu/drm/i915/intel_runtime_pm.c > index a2e367cf99a2..59e9222223c9 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -941,6 +941,9 @@ static void vlv_display_power_well_deinit(struct > drm_i915_private *dev_priv) > valleyview_disable_display_irqs(dev_priv); > spin_unlock_irq(&dev_priv->irq_lock); > > + /* make sure we're done processing display irqs */ > + synchronize_irq(dev_priv->dev->irq); > + > vlv_power_sequencer_reset(dev_priv); > } > _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
