From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> We repeat the SKL stride register value calculations a several places. Move it into a small helper function. Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/intel_display.c | 52 +++++++++++++++++------------------- drivers/gpu/drm/i915/intel_drv.h | 2 ++ drivers/gpu/drm/i915/intel_sprite.c | 12 ++------- 3 files changed, 29 insertions(+), 37 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 1561923906a1..66794681b2ba 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3192,6 +3192,28 @@ static void skl_detach_scalers(struct intel_crtc *intel_crtc) } } +u32 skl_plane_stride(const struct drm_framebuffer *fb, int plane, + unsigned int rotation) +{ + const struct drm_i915_private *dev_priv = to_i915(fb->dev); + u32 stride = intel_fb_pitch(fb, plane, rotation); + + /* + * The stride is either expressed as a multiple of 64 bytes chunks for + * linear buffers or in number of tiles for tiled buffers. + */ + if (intel_rotation_90_or_270(rotation)) { + int cpp = drm_format_plane_cpp(fb->pixel_format, plane); + + stride /= intel_tile_height(dev_priv, fb->modifier[0], cpp); + } else { + stride /= intel_fb_stride_alignment(dev_priv, fb->modifier[0], + fb->pixel_format); + } + + return stride; +} + u32 skl_plane_ctl_format(uint32_t pixel_format) { switch (pixel_format) { @@ -3282,8 +3304,9 @@ static void skylake_update_primary_plane(struct drm_plane *plane, struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); struct drm_framebuffer *fb = plane_state->base.fb; int pipe = intel_crtc->pipe; - u32 plane_ctl, stride; + u32 plane_ctl; unsigned int rotation = plane_state->base.rotation; + u32 stride = skl_plane_stride(fb, 0, rotation); u32 surf_addr; int scaler_id = plane_state->scaler_id; int src_x = plane_state->src.x1 >> 16; @@ -3311,8 +3334,6 @@ static void skylake_update_primary_plane(struct drm_plane *plane, .y1 = src_y, .y2 = src_y + src_h, }; - int cpp = drm_format_plane_cpp(fb->pixel_format, 0); - struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); /* Rotate src coordinates to match rotated GTT view */ drm_rect_rotate(&r, fb->width, fb->height, BIT(DRM_ROTATE_270)); @@ -3321,13 +3342,6 @@ static void skylake_update_primary_plane(struct drm_plane *plane, src_y = r.y1; src_w = drm_rect_width(&r); src_h = drm_rect_height(&r); - - stride = intel_fb->rotated[0].pitch / - intel_tile_height(dev_priv, fb->modifier[0], cpp); - } else { - stride = fb->pitches[0] / - intel_fb_stride_alignment(dev_priv, fb->modifier[0], - fb->pixel_format); } intel_add_fb_offsets(&src_x, &src_y, fb, 0, rotation); @@ -11542,7 +11556,7 @@ static void skl_do_mmio_flip(struct intel_crtc *intel_crtc, struct drm_i915_private *dev_priv = dev->dev_private; struct drm_framebuffer *fb = intel_crtc->base.primary->fb; const enum pipe pipe = intel_crtc->pipe; - u32 ctl, stride; + u32 ctl, stride = skl_plane_stride(fb, 0, rotation); ctl = I915_READ(PLANE_CTL(pipe, 0)); ctl &= ~PLANE_CTL_TILED_MASK; @@ -11563,22 +11577,6 @@ static void skl_do_mmio_flip(struct intel_crtc *intel_crtc, } /* - * The stride is either expressed as a multiple of 64 bytes chunks for - * linear buffers or in number of tiles for tiled buffers. - */ - if (intel_rotation_90_or_270(rotation)) { - int cpp = drm_format_plane_cpp(fb->pixel_format, 0); - struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); - - stride = intel_fb->rotated[0].pitch / - intel_tile_height(dev_priv, fb->modifier[0], cpp); - } else { - stride = fb->pitches[0] / - intel_fb_stride_alignment(dev_priv, fb->modifier[0], - fb->pixel_format); - } - - /* * Both PLANE_CTL and PLANE_STRIDE are not updated on vblank but on * PLANE_SURF updates, the update is then guaranteed to be atomic. */ diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 40cbe5c6163c..a32470acf529 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1236,6 +1236,8 @@ u32 intel_fb_gtt_offset(struct drm_framebuffer *fb, unsigned int rotation); u32 skl_plane_ctl_format(uint32_t pixel_format); u32 skl_plane_ctl_tiling(uint64_t fb_modifier); u32 skl_plane_ctl_rotation(unsigned int rotation); +u32 skl_plane_stride(const struct drm_framebuffer *fb, int plane, + unsigned int rotation); /* intel_csr.c */ void intel_csr_ucode_init(struct drm_i915_private *); diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 31be24f27207..94dd27045b51 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -186,13 +186,13 @@ skl_update_plane(struct drm_plane *drm_plane, struct drm_i915_private *dev_priv = dev->dev_private; struct intel_plane *intel_plane = to_intel_plane(drm_plane); struct drm_framebuffer *fb = plane_state->base.fb; - struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); const int pipe = intel_plane->pipe; const int plane = intel_plane->plane + 1; - u32 plane_ctl, stride; + u32 plane_ctl; const struct drm_intel_sprite_colorkey *key = &plane_state->ckey; u32 surf_addr; unsigned int rotation = plane_state->base.rotation; + u32 stride = skl_plane_stride(fb, 0, rotation); int crtc_x = plane_state->dst.x1; int crtc_y = plane_state->dst.y1; uint32_t crtc_w = drm_rect_width(&plane_state->dst); @@ -231,7 +231,6 @@ skl_update_plane(struct drm_plane *drm_plane, .y1 = y, .y2 = y + src_h, }; - unsigned int cpp = drm_format_plane_cpp(fb->pixel_format, 0); /* Rotate src coordinates to match rotated GTT view */ drm_rect_rotate(&r, fb->width, fb->height, BIT(DRM_ROTATE_270)); @@ -240,13 +239,6 @@ skl_update_plane(struct drm_plane *drm_plane, y = r.y1; src_w = drm_rect_width(&r); src_h = drm_rect_height(&r); - - stride = intel_fb->rotated[0].pitch / - intel_tile_height(dev_priv, fb->modifier[0], cpp); - } else { - stride = fb->pitches[0] / - intel_fb_stride_alignment(dev_priv, fb->modifier[0], - fb->pixel_format); } intel_add_fb_offsets(&x, &y, fb, 0, rotation); -- 2.4.10 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx