On Fri, 05 Feb 2016, "Thulasimani, Sivakumar" <sivakumar.thulasimani@xxxxxxxxx> wrote:
> Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@xxxxxxxxx>
Both pushed to drm-intel-next-queued, thanks for the review.
BR,
Jani.
>
> On 2/5/2016 3:46 PM, Jani Nikula wrote:
>> Make it cleaner to add more checks in the function. No functional
>> changes.
>>
>> Cc: Ander Conselvan de Oliveira <conselvan2@xxxxxxxxx>
>> Cc: Sivakumar Thulasimani <sivakumar.thulasimani@xxxxxxxxx>
>> Cc: drm-intel-fixes@xxxxxxxxxxxxxxxxxxxxx # dependency on the next patch
>> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
>> ---
>> drivers/gpu/drm/i915/intel_dp_link_training.c | 25 ++++++++++++++++++-------
>> 1 file changed, 18 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_dp_link_training.c b/drivers/gpu/drm/i915/intel_dp_link_training.c
>> index 88887938e0bf..83e667b92fda 100644
>> --- a/drivers/gpu/drm/i915/intel_dp_link_training.c
>> +++ b/drivers/gpu/drm/i915/intel_dp_link_training.c
>> @@ -215,16 +215,15 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp)
>> }
>> }
>>
>> -static void
>> -intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp)
>> +/*
>> + * Pick training pattern for channel equalization. Training Pattern 3 for HBR2
>> + * or 1.2 devices that support it, Training Pattern 2 otherwise.
>> + */
>> +static u32 intel_dp_training_pattern(struct intel_dp *intel_dp)
>> {
>> - bool channel_eq = false;
>> - int tries, cr_tries;
>> - uint32_t training_pattern = DP_TRAINING_PATTERN_2;
>> + u32 training_pattern = DP_TRAINING_PATTERN_2;
>>
>> /*
>> - * Training Pattern 3 for HBR2 or 1.2 devices that support it.
>> - *
>> * Intel platforms that support HBR2 also support TPS3. TPS3 support is
>> * also mandatory for downstream devices that support HBR2.
>> *
>> @@ -237,6 +236,18 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp)
>> else if (intel_dp->link_rate == 540000)
>> DRM_ERROR("5.4 Gbps link rate without HBR2/TPS3 support\n");
>>
>> + return training_pattern;
>> +}
>> +
>> +static void
>> +intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp)
>> +{
>> + bool channel_eq = false;
>> + int tries, cr_tries;
>> + u32 training_pattern;
>> +
>> + training_pattern = intel_dp_training_pattern(intel_dp);
>> +
>> /* channel equalization */
>> if (!intel_dp_set_link_train(intel_dp,
>> training_pattern |
>
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--
Jani Nikula, Intel Open Source Technology Center
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