On 21/01/16 21:41, Jeff McGee wrote:
On Thu, Jan 21, 2016 at 06:11:01PM +0000, Peter Antoine wrote:
This patch resizes the GuC WOPCM to so that the GuC and the RC6 memory
spaces do not overlap.
Issue: https://jira01.devtools.intel.com/browse/VIZ-6638
Signed-off-by: Peter Antoine <peter.antoine@xxxxxxxxx>
---
drivers/gpu/drm/i915/i915_guc_reg.h | 3 ++-
drivers/gpu/drm/i915/intel_guc_loader.c | 6 +++++-
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_guc_reg.h b/drivers/gpu/drm/i915/i915_guc_reg.h
index 685c799..cb938b0 100644
--- a/drivers/gpu/drm/i915/i915_guc_reg.h
+++ b/drivers/gpu/drm/i915/i915_guc_reg.h
@@ -58,7 +58,8 @@
#define GUC_MAX_IDLE_COUNT _MMIO(0xC3E4)
#define GUC_WOPCM_SIZE _MMIO(0xc050)
-#define GUC_WOPCM_SIZE_VALUE (0x80 << 12) /* 512KB */
+#define GUC_WOPCM_SIZE_VALUE (0x80 << 12) /* 512KB */
+#define BXT_GUC_WOPCM_SIZE_VALUE (0x70 << 12) /* 448KB */
/* GuC addresses below GUC_WOPCM_TOP don't map through the GTT */
#define GUC_WOPCM_TOP (GUC_WOPCM_SIZE_VALUE)
Should GUC_WOPCM_TOP be dynamically assigned the proper value, or is it
sufficient to leave at the max possible WOPCM size? If the later, might be
worth a comment.
-Jeff
This isn't the right interpretation of these values.
GUC_WOPCM_TOP is the value defining the top of the GTT address range NOT
available to the GuC and hence where GuC-accessible objects must NOT be
placed.
GUC_WOPCM_SIZE_VALUE is the value written to the GUC_WOPCM_SIZE
register, defining how much WOPCM space CAN be used.
The former is an architectural constant (512K); the latter is a
software-defined boundary between areas of memory within that range that
are used for different purposes.
Therefore, GUC_WOPCM_TOP must NOT be defined in terms of
GUC_WOPCM_SIZE_VALUE, but GUC_WOPCM_SIZE_VALUE could be defined in terms
of GUC_WOPCM_TOP, in particular as (GUC_WOPCM_TOP-reserved).
.Dave.
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