This change is needed to enable DSI/MIPI display on BXT Reviewed-by: Mika Kahola <mika.kahola@xxxxxxxxx> On Tue, 2016-02-02 at 23:21 +0530, Ramalingam C wrote: > We need to enable DSI PLL before configuring the DSI registers. > > Signed-off-by: Ramalingam C <ramalingam.c@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_dsi.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c > index 91cef35..378f879 100644 > --- a/drivers/gpu/drm/i915/intel_dsi.c > +++ b/drivers/gpu/drm/i915/intel_dsi.c > @@ -478,8 +478,8 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder) > > DRM_DEBUG_KMS("\n"); > > - intel_dsi_prepare(encoder); > intel_enable_dsi_pll(encoder); > + intel_dsi_prepare(encoder); > > /* Panel Enable over CRC PMIC */ > if (intel_dsi->gpio_panel) _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx