On Mon, Feb 01, 2016 at 04:27:47PM +0000, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx>
>
> Looks like this code does not need to wait atomically since it
> otherwise takes the mutex. But did it rely on on the requested
> 1us wait actually being up to 1ms?
Bspec says 1 us, so it *should* be fine.
Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx>
> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_display.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 304fc9637026..a7530cf612d7 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9753,8 +9753,8 @@ static void broadwell_set_cdclk(struct drm_device *dev, int cdclk)
> val |= LCPLL_CD_SOURCE_FCLK;
> I915_WRITE(LCPLL_CTL, val);
>
> - if (wait_for_atomic_us(I915_READ(LCPLL_CTL) &
> - LCPLL_CD_SOURCE_FCLK_DONE, 1))
> + if (wait_for_us(I915_READ(LCPLL_CTL) &
> + LCPLL_CD_SOURCE_FCLK_DONE, 1))
> DRM_ERROR("Switching to FCLK failed\n");
>
> val = I915_READ(LCPLL_CTL);
> @@ -9788,8 +9788,8 @@ static void broadwell_set_cdclk(struct drm_device *dev, int cdclk)
> val &= ~LCPLL_CD_SOURCE_FCLK;
> I915_WRITE(LCPLL_CTL, val);
>
> - if (wait_for_atomic_us((I915_READ(LCPLL_CTL) &
> - LCPLL_CD_SOURCE_FCLK_DONE) == 0, 1))
> + if (wait_for_us((I915_READ(LCPLL_CTL) &
> + LCPLL_CD_SOURCE_FCLK_DONE) == 0, 1))
> DRM_ERROR("Switching back to LCPLL failed\n");
>
> mutex_lock(&dev_priv->rps.hw_lock);
> --
> 1.9.1
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
