On Thu, Jan 14, 2016 at 12:53:34PM +0200, Jani Nikula wrote:
> Add a common function to return "on" or "off" string based on the
> argument, and drop the local versions of it.
>
> This is the onoff version of
>
> commit 42a8ca4cb4a48ddbf40e8edb291425e76bcdc230
> Author: Jani Nikula <jani.nikula@xxxxxxxxx>
> Date: Thu Aug 27 16:23:30 2015 +0300
>
> drm/i915: add yesno utility function
>
> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 6 +++---
> drivers/gpu/drm/i915/i915_drv.h | 5 +++++
> drivers/gpu/drm/i915/intel_display.c | 30 ++++++++++++------------------
> drivers/gpu/drm/i915/intel_dp.c | 9 ++-------
> drivers/gpu/drm/i915/intel_pm.c | 11 +++++------
> 5 files changed, 27 insertions(+), 34 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index f17a2b0c2493..975af3568521 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1335,8 +1335,8 @@ static int vlv_wait_for_gt_wells(struct drm_i915_private *dev_priv,
> return 0;
>
> DRM_DEBUG_KMS("waiting for GT wells to go %s (%08x)\n",
> - wait_for_on ? "on" : "off",
> - I915_READ(VLV_GTLC_PW_STATUS));
> + onoff(wait_for_on),
> + I915_READ(VLV_GTLC_PW_STATUS));
>
> /*
> * RC6 transitioning can be delayed up to 2 msec (see
> @@ -1345,7 +1345,7 @@ static int vlv_wait_for_gt_wells(struct drm_i915_private *dev_priv,
> err = wait_for(COND, 3);
> if (err)
> DRM_ERROR("timeout waiting for GT wells to go %s\n",
> - wait_for_on ? "on" : "off");
> + onoff(wait_for_on));
>
> return err;
> #undef COND
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 104bd1809936..eb7bb97f7316 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -102,6 +102,11 @@ static inline const char *yesno(bool v)
> return v ? "yes" : "no";
> }
>
> +static inline const char *onoff(bool v)
> +{
> + return v ? "on" : "off";
> +}
> +
> enum pipe {
> INVALID_PIPE = -1,
> PIPE_A = 0,
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index a087892dd797..0f52f71402a0 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1150,11 +1150,6 @@ static void intel_wait_for_pipe_off(struct intel_crtc *crtc)
> }
> }
>
> -static const char *state_string(bool enabled)
> -{
> - return enabled ? "on" : "off";
> -}
> -
> /* Only for pre-ILK configs */
> void assert_pll(struct drm_i915_private *dev_priv,
> enum pipe pipe, bool state)
> @@ -1166,7 +1161,7 @@ void assert_pll(struct drm_i915_private *dev_priv,
> cur_state = !!(val & DPLL_VCO_ENABLE);
> I915_STATE_WARN(cur_state != state,
> "PLL state assertion failure (expected %s, current %s)\n",
> - state_string(state), state_string(cur_state));
> + onoff(state), onoff(cur_state));
> }
>
> /* XXX: the dsi pll is shared between MIPI DSI ports */
> @@ -1182,7 +1177,7 @@ static void assert_dsi_pll(struct drm_i915_private *dev_priv, bool state)
> cur_state = val & DSI_PLL_VCO_EN;
> I915_STATE_WARN(cur_state != state,
> "DSI PLL state assertion failure (expected %s, current %s)\n",
> - state_string(state), state_string(cur_state));
> + onoff(state), onoff(cur_state));
> }
> #define assert_dsi_pll_enabled(d) assert_dsi_pll(d, true)
> #define assert_dsi_pll_disabled(d) assert_dsi_pll(d, false)
> @@ -1206,14 +1201,13 @@ void assert_shared_dpll(struct drm_i915_private *dev_priv,
> bool cur_state;
> struct intel_dpll_hw_state hw_state;
>
> - if (WARN (!pll,
> - "asserting DPLL %s with no DPLL\n", state_string(state)))
> + if (WARN(!pll, "asserting DPLL %s with no DPLL\n", onoff(state)))
> return;
>
> cur_state = pll->get_hw_state(dev_priv, pll, &hw_state);
> I915_STATE_WARN(cur_state != state,
> "%s assertion failure (expected %s, current %s)\n",
> - pll->name, state_string(state), state_string(cur_state));
> + pll->name, onoff(state), onoff(cur_state));
> }
>
> static void assert_fdi_tx(struct drm_i915_private *dev_priv,
> @@ -1233,7 +1227,7 @@ static void assert_fdi_tx(struct drm_i915_private *dev_priv,
> }
> I915_STATE_WARN(cur_state != state,
> "FDI TX state assertion failure (expected %s, current %s)\n",
> - state_string(state), state_string(cur_state));
> + onoff(state), onoff(cur_state));
> }
> #define assert_fdi_tx_enabled(d, p) assert_fdi_tx(d, p, true)
> #define assert_fdi_tx_disabled(d, p) assert_fdi_tx(d, p, false)
> @@ -1248,7 +1242,7 @@ static void assert_fdi_rx(struct drm_i915_private *dev_priv,
> cur_state = !!(val & FDI_RX_ENABLE);
> I915_STATE_WARN(cur_state != state,
> "FDI RX state assertion failure (expected %s, current %s)\n",
> - state_string(state), state_string(cur_state));
> + onoff(state), onoff(cur_state));
> }
> #define assert_fdi_rx_enabled(d, p) assert_fdi_rx(d, p, true)
> #define assert_fdi_rx_disabled(d, p) assert_fdi_rx(d, p, false)
> @@ -1280,7 +1274,7 @@ void assert_fdi_rx_pll(struct drm_i915_private *dev_priv,
> cur_state = !!(val & FDI_RX_PLL_ENABLE);
> I915_STATE_WARN(cur_state != state,
> "FDI RX PLL assertion failure (expected %s, current %s)\n",
> - state_string(state), state_string(cur_state));
> + onoff(state), onoff(cur_state));
> }
>
> void assert_panel_unlocked(struct drm_i915_private *dev_priv,
> @@ -1338,7 +1332,7 @@ static void assert_cursor(struct drm_i915_private *dev_priv,
>
> I915_STATE_WARN(cur_state != state,
> "cursor on pipe %c assertion failure (expected %s, current %s)\n",
> - pipe_name(pipe), state_string(state), state_string(cur_state));
> + pipe_name(pipe), onoff(state), onoff(cur_state));
> }
> #define assert_cursor_enabled(d, p) assert_cursor(d, p, true)
> #define assert_cursor_disabled(d, p) assert_cursor(d, p, false)
> @@ -1365,7 +1359,7 @@ void assert_pipe(struct drm_i915_private *dev_priv,
>
> I915_STATE_WARN(cur_state != state,
> "pipe %c assertion failure (expected %s, current %s)\n",
> - pipe_name(pipe), state_string(state), state_string(cur_state));
> + pipe_name(pipe), onoff(state), onoff(cur_state));
> }
>
> static void assert_plane(struct drm_i915_private *dev_priv,
> @@ -1378,7 +1372,7 @@ static void assert_plane(struct drm_i915_private *dev_priv,
> cur_state = !!(val & DISPLAY_PLANE_ENABLE);
> I915_STATE_WARN(cur_state != state,
> "plane %c assertion failure (expected %s, current %s)\n",
> - plane_name(plane), state_string(state), state_string(cur_state));
> + plane_name(plane), onoff(state), onoff(cur_state));
> }
>
> #define assert_plane_enabled(d, p) assert_plane(d, p, true)
> @@ -16332,7 +16326,7 @@ intel_display_print_error_state(struct drm_i915_error_state_buf *m,
> for_each_pipe(dev_priv, i) {
> err_printf(m, "Pipe [%d]:\n", i);
> err_printf(m, " Power: %s\n",
> - error->pipe[i].power_domain_on ? "on" : "off");
> + onoff(error->pipe[i].power_domain_on));
> err_printf(m, " SRC: %08x\n", error->pipe[i].source);
> err_printf(m, " STAT: %08x\n", error->pipe[i].stat);
>
> @@ -16360,7 +16354,7 @@ intel_display_print_error_state(struct drm_i915_error_state_buf *m,
> err_printf(m, "CPU transcoder: %c\n",
> transcoder_name(error->transcoder[i].cpu_transcoder));
> err_printf(m, " Power: %s\n",
> - error->transcoder[i].power_domain_on ? "on" : "off");
> + onoff(error->transcoder[i].power_domain_on));
> err_printf(m, " CONF: %08x\n", error->transcoder[i].conf);
> err_printf(m, " HTOTAL: %08x\n", error->transcoder[i].htotal);
> err_printf(m, " HBLANK: %08x\n", error->transcoder[i].hblank);
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index c8f58ab1bacc..17612548c58d 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -2238,11 +2238,6 @@ static void intel_edp_backlight_power(struct intel_connector *connector,
> _intel_edp_backlight_off(intel_dp);
> }
>
> -static const char *state_string(bool enabled)
> -{
> - return enabled ? "on" : "off";
> -}
> -
> static void assert_dp_port(struct intel_dp *intel_dp, bool state)
> {
> struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> @@ -2252,7 +2247,7 @@ static void assert_dp_port(struct intel_dp *intel_dp, bool state)
> I915_STATE_WARN(cur_state != state,
> "DP port %c state assertion failure (expected %s, current %s)\n",
> port_name(dig_port->port),
> - state_string(state), state_string(cur_state));
> + onoff(state), onoff(cur_state));
> }
> #define assert_dp_port_disabled(d) assert_dp_port((d), false)
>
> @@ -2262,7 +2257,7 @@ static void assert_edp_pll(struct drm_i915_private *dev_priv, bool state)
>
> I915_STATE_WARN(cur_state != state,
> "eDP PLL state assertion failure (expected %s, current %s)\n",
> - state_string(state), state_string(cur_state));
> + onoff(state), onoff(cur_state));
> }
> #define assert_edp_pll_enabled(d) assert_edp_pll((d), true)
> #define assert_edp_pll_disabled(d) assert_edp_pll((d), false)
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 9df9e9a22f3c..465ca76df201 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4590,13 +4590,13 @@ static void intel_print_rc6_info(struct drm_device *dev, u32 mode)
> }
> if (HAS_RC6p(dev))
> DRM_DEBUG_KMS("Enabling RC6 states: RC6 %s RC6p %s RC6pp %s\n",
> - (mode & GEN6_RC_CTL_RC6_ENABLE) ? "on" : "off",
> - (mode & GEN6_RC_CTL_RC6p_ENABLE) ? "on" : "off",
> - (mode & GEN6_RC_CTL_RC6pp_ENABLE) ? "on" : "off");
> + onoff(mode & GEN6_RC_CTL_RC6_ENABLE),
> + onoff(mode & GEN6_RC_CTL_RC6p_ENABLE),
> + onoff(mode & GEN6_RC_CTL_RC6pp_ENABLE));
>
> else
> DRM_DEBUG_KMS("Enabling RC6 states: RC6 %s\n",
> - (mode & GEN6_RC_CTL_RC6_ENABLE) ? "on" : "off");
> + onoff(mode & GEN6_RC_CTL_RC6_ENABLE));
> }
>
> static int sanitize_rc6_option(const struct drm_device *dev, int enable_rc6)
> @@ -4774,8 +4774,7 @@ static void gen9_enable_rc6(struct drm_device *dev)
> /* 3a: Enable RC6 */
> if (intel_enable_rc6(dev) & INTEL_RC6_ENABLE)
> rc6_mask = GEN6_RC_CTL_RC6_ENABLE;
> - DRM_INFO("RC6 %s\n", (rc6_mask & GEN6_RC_CTL_RC6_ENABLE) ?
> - "on" : "off");
> + DRM_INFO("RC6 %s\n", onoff(rc6_mask & GEN6_RC_CTL_RC6_ENABLE));
> /* WaRsUseTimeoutMode */
> if (IS_SKL_REVID(dev, 0, SKL_REVID_D0) ||
> IS_BXT_REVID(dev, 0, BXT_REVID_A1)) {
> --
> 2.1.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
