>-----Original Message----- >From: Ander Conselvan De Oliveira [mailto:conselvan2@xxxxxxxxx] >Sent: Monday, January 11, 2016 8:07 PM >To: R, Durgadoss; intel-gfx@xxxxxxxxxxxxxxxxxxxxx >Subject: Re: [PATCH 5/7] drm/i915/dp: Add methods to update link train params > >On Fri, 2015-12-11 at 15:09 +0530, Durgadoss R wrote: >> Retrying with reduced lanes/bw and updating the final >> available lanes/bw to DPCD is needed for upfront link >> train logic. Hence, this patch adds these methods >> and exports them so that these can be called from >> other files like ddi.c/display.c. >> >> Signed-off-by: Durgadoss R <durgadoss.r@xxxxxxxxx> >> --- >> drivers/gpu/drm/i915/intel_dp.c | 34 ++++++++++++++++++++++++++++++++++ >> drivers/gpu/drm/i915/intel_drv.h | 2 ++ >> 2 files changed, 36 insertions(+) >> >> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c >> index f335c92..d8f7830 100644 >> --- a/drivers/gpu/drm/i915/intel_dp.c >> +++ b/drivers/gpu/drm/i915/intel_dp.c >> @@ -1660,6 +1660,40 @@ void intel_dp_set_link_params(struct intel_dp >> *intel_dp, >> intel_dp->lane_count = pipe_config->lane_count; >> } >> >> +void intel_dp_update_dpcd_params(struct intel_dp *intel_dp) >> +{ >> + intel_dp->dpcd[DP_MAX_LANE_COUNT] &= ~DP_MAX_LANE_COUNT_MASK; >> + intel_dp->dpcd[DP_MAX_LANE_COUNT] |= >> + intel_dp->lane_count & DP_MAX_LANE_COUNT_MASK; >> + >> + intel_dp->dpcd[DP_MAX_LINK_RATE] = >> + drm_dp_link_rate_to_bw_code(intel_dp->link_rate); >> +} >> + >> +bool intel_dp_get_link_retry_params(uint8_t *lane_count, uint8_t *link_bw) >> +{ >> + /* >> + * As per DP1.3 Spec, retry all link rates for a particular >> + * lane count value, before reducing number of lanes. >> + */ >> + if (*link_bw == DP_LINK_BW_5_4) { >> + *link_bw = DP_LINK_BW_2_7; >> + } else if (*link_bw == DP_LINK_BW_2_7) { >> + *link_bw = DP_LINK_BW_1_62; >> + } else if (*lane_count == 4) { >> + *lane_count = 2; >> + *link_bw = DP_LINK_BW_5_4; >> + } else if (*lane_count == 2) { >> + *lane_count = 1; >> + *link_bw = DP_LINK_BW_5_4; > >If the sink doesn't support 5.4 Gbps, shouldn't we skip that rate? > >Also, it would be easier to review these functions if they were in same patch >were they are used. Ok, will take care of this next version. Thanks, Durga > >Ander > >> + } else { >> + /* Tried all combinations, so exit */ >> + return false; >> + } >> + >> + return true; >> +} >> + >> static void intel_dp_prepare(struct intel_encoder *encoder) >> { >> struct drm_device *dev = encoder->base.dev; >> diff --git a/drivers/gpu/drm/i915/intel_drv.h >> b/drivers/gpu/drm/i915/intel_drv.h >> index faa91fc..5cefb0e 100644 >> --- a/drivers/gpu/drm/i915/intel_drv.h >> +++ b/drivers/gpu/drm/i915/intel_drv.h >> @@ -1233,6 +1233,8 @@ bool intel_dp_init_connector(struct intel_digital_port >> *intel_dig_port, >> struct intel_connector *intel_connector); >> void intel_dp_set_link_params(struct intel_dp *intel_dp, >> const struct intel_crtc_state *pipe_config); >> +void intel_dp_update_dpcd_params(struct intel_dp *intel_dp); >> +bool intel_dp_get_link_retry_params(uint8_t *lane_count, uint8_t *link_bw); >> void intel_dp_start_link_train(struct intel_dp *intel_dp); >> void intel_dp_stop_link_train(struct intel_dp *intel_dp); >> void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode); _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
