[PATCH 153/190] drm/i915: Record the position of the start of the request

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Not only does it make for good documentation and debugging aide, but it
is also vital for when we want to unwind requests - such as when
throwing away an incomplete request.

v2: Rebase

Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
---
 drivers/gpu/drm/i915/i915_drv.h         |  1 +
 drivers/gpu/drm/i915/i915_gem_request.c | 16 +++++++---------
 drivers/gpu/drm/i915/i915_gpu_error.c   |  4 +++-
 3 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c460dc0c14e1..84693d4c4e52 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -566,6 +566,7 @@ struct drm_i915_error_state {
 		struct drm_i915_error_request {
 			long jiffies;
 			u32 seqno;
+			u32 head;
 			u32 tail;
 		} *requests;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_request.c b/drivers/gpu/drm/i915/i915_gem_request.c
index 9e8e594ce2bd..74be71e7d113 100644
--- a/drivers/gpu/drm/i915/i915_gem_request.c
+++ b/drivers/gpu/drm/i915/i915_gem_request.c
@@ -244,6 +244,13 @@ i915_gem_request_alloc(struct intel_engine_cs *engine,
 		goto err;
 	}
 
+	/* Record the position of the start of the request so that
+	 * should we detect the updated seqno part-way through the
+	 * GPU processing the request, we never over-estimate the
+	 * position of the head.
+	 */
+	req->head = intel_ring_get_tail(req->ring);
+
 	/*
 	 * Reserve space in the ring buffer for all the commands required to
 	 * eventually emit this request. This is to guarantee that the
@@ -421,7 +428,6 @@ static void i915_gem_mark_busy(struct drm_i915_private *dev_priv)
 void __i915_add_request(struct drm_i915_gem_request *request, bool flush_caches)
 {
 	struct intel_ring *ring = request->ring;
-	u32 request_start;
 	int ret;
 
 	/*
@@ -431,7 +437,6 @@ void __i915_add_request(struct drm_i915_gem_request *request, bool flush_caches)
 	 */
 	intel_ring_reserved_space_use(ring);
 
-	request_start = intel_ring_get_tail(ring);
 	/*
 	 * Emit any outstanding flushes - execbuf can fail to emit the flush
 	 * after having emitted the batchbuffer command. Hence we need to fix
@@ -451,13 +456,6 @@ void __i915_add_request(struct drm_i915_gem_request *request, bool flush_caches)
 	/* Not allowed to fail! */
 	WARN(ret, "emit|add_request failed: %d!\n", ret);
 
-	/* Record the position of the start of the request so that
-	 * should we detect the updated seqno part-way through the
-	 * GPU processing the request, we never over-estimate the
-	 * position of the head.
-	 */
-	request->head = request_start;
-
 	request->emitted_jiffies = jiffies;
 	request->previous_seqno = request->engine->last_submitted_seqno;
 	request->engine->last_submitted_seqno = request->fence.seqno;
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index a2935d7e9278..494dee1f724d 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -457,9 +457,10 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
 				   dev_priv->ring[i].name,
 				   error->ring[i].num_requests);
 			for (j = 0; j < error->ring[i].num_requests; j++) {
-				err_printf(m, "  seqno 0x%08x, emitted %ld, tail 0x%08x\n",
+				err_printf(m, "  seqno 0x%08x, emitted %ld, head 0x%08x tail 0x%08x\n",
 					   error->ring[i].requests[j].seqno,
 					   error->ring[i].requests[j].jiffies,
+					   error->ring[i].requests[j].head,
 					   error->ring[i].requests[j].tail);
 			}
 		}
@@ -1067,6 +1068,7 @@ static void i915_gem_record_rings(struct drm_device *dev,
 			erq = &error->ring[i].requests[count++];
 			erq->seqno = request->fence.seqno;
 			erq->jiffies = request->emitted_jiffies;
+			erq->head = request->head;
 			erq->tail = request->tail;
 		}
 	}
-- 
2.7.0.rc3

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