This patch fix some spelling typos found in Documentation/Docbook gpu/ch04s03.html. This file was generated from comments within source, so I have to fix typos in i915_gem_fence.c. Signed-off-by: Masanari Iida <standby24x7@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_gem_fence.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_fence.c b/drivers/gpu/drm/i915/i915_gem_fence.c index 5981985..a2b938e 100644 --- a/drivers/gpu/drm/i915/i915_gem_fence.c +++ b/drivers/gpu/drm/i915/i915_gem_fence.c @@ -34,8 +34,8 @@ * set of these objects. * * Fences are used to detile GTT memory mappings. They're also connected to the - * hardware frontbuffer render tracking and hence interract with frontbuffer - * conmpression. Furthermore on older platforms fences are required for tiled + * hardware frontbuffer render tracking and hence interact with frontbuffer + * compression. Furthermore on older platforms fences are required for tiled * objects used by the display engine. They can also be used by the render * engine - they're required for blitter commands and are optional for render * commands. But on gen4+ both display (with the exception of fbc) and rendering @@ -46,8 +46,8 @@ * * Finally note that because fences are such a restricted resource they're * dynamically associated with objects. Furthermore fence state is committed to - * the hardware lazily to avoid unecessary stalls on gen2/3. Therefore code must - * explictly call i915_gem_object_get_fence() to synchronize fencing status + * the hardware lazily to avoid unnecessary stalls on gen2/3. Therefore code must + * explicitly call i915_gem_object_get_fence() to synchronize fencing status * for cpu access. Also note that some code wants an unfenced view, for those * cases the fence can be removed forcefully with i915_gem_object_put_fence(). * @@ -527,7 +527,7 @@ void i915_gem_restore_fences(struct drm_device *dev) * required. * * When bit 17 is XORed in, we simply refuse to tile at all. Bit - * 17 is not just a page offset, so as we page an objet out and back in, + * 17 is not just a page offset, so as we page an object out and back in, * individual pages in it will have different bit 17 addresses, resulting in * each 64 bytes being swapped with its neighbor! * -- 2.7.0.rc3 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
