On Fri, Dec 11, 2015 at 03:13:37PM +0100, Michał Winiarski wrote:
> According to bspec, some parts of HW require the addresses to be in
> a canonical form, where bits [63:48] == [47]. Let's convert addresses to
> canonical form prior to relocating and return converted offsets to
> userspace. We also need to make sure that userspace is using addresses
> in canonical form in case of softpin.
>
> v2: Whitespace fixup, gen8_canonical_addr description (Chris, Ville)
> v3: Rebase on top of softpin, fix a hole in relocate_entry,
> s/expect/require (Chris)
>
> Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
> Cc: Michel Thierry <michel.thierry@xxxxxxxxx>
> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> Signed-off-by: Michał Winiarski <michal.winiarski@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_gem.c | 9 +++++++--
> drivers/gpu/drm/i915/i915_gem_execbuffer.c | 21 +++++++++++++++------
> drivers/gpu/drm/i915/i915_gem_gtt.h | 12 ++++++++++++
> 3 files changed, 34 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 8e2acde..b83207b 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3482,12 +3482,17 @@ i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj,
>
> if (flags & PIN_OFFSET_FIXED) {
> uint64_t offset = flags & PIN_OFFSET_MASK;
> + uint64_t noncanonical_offset = offset & ((1ULL << 48) - 1);
No. Core GEM doesn't care about canonical addresses, it just operates
with respect to the drm_mm range manager.
More importantly you missed that the only chance we have to validate the
user parameters is during validate_exec_list().
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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