On Wed, Dec 16, 2015 at 12:18:20AM +0000, Chris Wilson wrote: > On Tue, Dec 15, 2015 at 04:13:49PM -0800, Ben Widawsky wrote: > > This has been incorrect since the original commit from Oscar Mateo here: > > commit 4da46e1e5bb7e7396fad172cdaffbe496562f3d8 > > Author: Oscar Mateo <oscar.mateo@xxxxxxxxx> > > Date: Thu Jul 24 17:04:27 2014 +0100 > > > > drm/i915/bdw: GEN-specific logical ring emit request > > > > The command's offset field is only 10 bits, and this is correct in all the other > > add_request commands. It's highly likely this this patch makes no functional > > difference because the hardware will hopefully ignore 31:12 anyway. Technically > > the existing code is wrong because the docs say the upper bits are MBZ. > > Ultimately, the patch just clears up the confusion. > > > > NOTE: This patch was compile tested only. > > NOTE2: The modern docs call it MI_STORE_DATA_INDEX not MI_STORE_DWORD_INDEX > > It doesn't use MI_STORE_DATA_INDEX, but a write to a specific memory > address (MI_STORE_DWORD_IMM) as it is not storing in the per-context HWS > but a global (per-engine) page. > -Chris > > -- > Chris Wilson, Intel Open Source Technology Centre You're right. I just noticed the cmd = MI_STORE_DWORD_IMM_GEN4. Sorry about that. -- Ben Widawsky, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx