On Thu, Dec 10, 2015 at 02:48:48PM +0100, Daniel Vetter wrote: > On Tue, Dec 08, 2015 at 07:59:46PM +0200, ville.syrjala@xxxxxxxxxxxxxxx wrote: > > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > > When the DDI port is in HDMI/DVI mode, it automagically uses the buffer > > translations values from entry 9. Let's make that explicit in the code. > > > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Or WARN_ON(i != 9); Either way don't see that much benefit, but I guess > won't hurt either. Reviewed-by: Daniel Vetter <daniel.vetter@xxxxxxxx> I guess I could just squash this with the split DP vs. HDMI buffer programming patch since the 'i' will be gone there anyway. > > > --- > > drivers/gpu/drm/i915/intel_ddi.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c > > index 5f008f0fdc13..f812607045d6 100644 > > --- a/drivers/gpu/drm/i915/intel_ddi.c > > +++ b/drivers/gpu/drm/i915/intel_ddi.c > > @@ -516,9 +516,9 @@ void intel_prepare_ddi_buffers(struct intel_encoder *encoder) > > hdmi_level = hdmi_default_entry; > > > > /* Entry 9 is for HDMI: */ > > - I915_WRITE(DDI_BUF_TRANS_LO(port, i), > > + I915_WRITE(DDI_BUF_TRANS_LO(port, 9), > > ddi_translations_hdmi[hdmi_level].trans1 | iboost_bit); > > - I915_WRITE(DDI_BUF_TRANS_HI(port, i), > > + I915_WRITE(DDI_BUF_TRANS_HI(port, 9), > > ddi_translations_hdmi[hdmi_level].trans2); > > } > > > > -- > > 2.4.10 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Daniel Vetter > Software Engineer, Intel Corporation > http://blog.ffwll.ch -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
