On Thu, Dec 10, 2015 at 02:22:01PM +0100, Daniel Vetter wrote:
> On Tue, Dec 08, 2015 at 07:59:38PM +0200, ville.syrjala@xxxxxxxxxxxxxxx wrote:
> > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> >
> > Rather than having open coded checks for the DDI A/E configuration,
> > just store the max supported lane count in intel_digital_port.
> >
> > We had an open coded check for DDI A, but not for DDI E. So we may
> > have been vilating the DDI E max lane count.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> Isn't this going to break on non-DDI platforms?
It always sets 'intel_dig_port->max_lanes = 4' for non-DDI encoders.
> -Daniel
>
> > ---
> > drivers/gpu/drm/i915/intel_ddi.c | 10 +---------
> > drivers/gpu/drm/i915/intel_dp.c | 13 +++++++------
> > drivers/gpu/drm/i915/intel_drv.h | 1 +
> > drivers/gpu/drm/i915/intel_hdmi.c | 6 ++++++
> > 4 files changed, 15 insertions(+), 15 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> > index e903d9c87680..fdb4aaa084d6 100644
> > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > @@ -3315,15 +3315,6 @@ void intel_ddi_init(struct drm_device *dev, enum port port)
> > return;
> > }
> >
> > - if (WARN(max_lanes == 0,
> > - "No lanes for port %c\n", port_name(port)))
> > - return;
> > -
> > - if (WARN(init_hdmi && max_lanes < 4,
> > - "Not enough lanes (%d) for HDMI on port %c\n",
> > - max_lanes, port_name(port)))
> > - init_hdmi = false;
> > -
> > intel_dig_port = kzalloc(sizeof(*intel_dig_port), GFP_KERNEL);
> > if (!intel_dig_port)
> > return;
> > @@ -3346,6 +3337,7 @@ void intel_ddi_init(struct drm_device *dev, enum port port)
> > intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
> > (DDI_BUF_PORT_REVERSAL |
> > DDI_A_4_LANES);
> > + intel_dig_port->max_lanes = max_lanes;
> >
> > /*
> > * Bspec says that DDI_A_4_LANES is the only supported configuration
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > index f335c92b4fa7..7d354b1e5e5f 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -157,14 +157,9 @@ intel_dp_max_link_bw(struct intel_dp *intel_dp)
> > static u8 intel_dp_max_lane_count(struct intel_dp *intel_dp)
> > {
> > struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> > - struct drm_device *dev = intel_dig_port->base.base.dev;
> > u8 source_max, sink_max;
> >
> > - source_max = 4;
> > - if (HAS_DDI(dev) && intel_dig_port->port == PORT_A &&
> > - (intel_dig_port->saved_port_bits & DDI_A_4_LANES) == 0)
> > - source_max = 2;
> > -
> > + source_max = intel_dig_port->max_lanes;
> > sink_max = drm_dp_max_lane_count(intel_dp->dpcd);
> >
> > return min(source_max, sink_max);
> > @@ -5820,6 +5815,11 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
> > enum port port = intel_dig_port->port;
> > int type, ret;
> >
> > + if (WARN(intel_dig_port->max_lanes < 1,
> > + "Not enough lanes (%d) for DP on port %c\n",
> > + intel_dig_port->max_lanes, port_name(port)))
> > + return false;
> > +
> > intel_dp->pps_pipe = INVALID_PIPE;
> >
> > /* intel_dp vfuncs */
> > @@ -6016,6 +6016,7 @@ intel_dp_init(struct drm_device *dev,
> >
> > intel_dig_port->port = port;
> > intel_dig_port->dp.output_reg = output_reg;
> > + intel_dig_port->max_lanes = 4;
> >
> > intel_encoder->type = INTEL_OUTPUT_DISPLAYPORT;
> > if (IS_CHERRYVIEW(dev)) {
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> > index 8963a8a53b0b..43d451c7c366 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -818,6 +818,7 @@ struct intel_digital_port {
> > struct intel_hdmi hdmi;
> > enum irqreturn (*hpd_pulse)(struct intel_digital_port *, bool);
> > bool release_cl2_override;
> > + uint8_t max_lanes;
> > };
> >
> > struct intel_dp_mst_encoder {
> > diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
> > index c3978bad5ca0..895189abfd56 100644
> > --- a/drivers/gpu/drm/i915/intel_hdmi.c
> > +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> > @@ -2034,6 +2034,11 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
> > enum port port = intel_dig_port->port;
> > uint8_t alternate_ddc_pin;
> >
> > + if (WARN(intel_dig_port->max_lanes < 4,
> > + "Not enough lanes (%d) for HDMI on port %c\n",
> > + intel_dig_port->max_lanes, port_name(port)))
> > + return;
> > +
> > drm_connector_init(dev, connector, &intel_hdmi_connector_funcs,
> > DRM_MODE_CONNECTOR_HDMIA);
> > drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs);
> > @@ -2217,6 +2222,7 @@ void intel_hdmi_init(struct drm_device *dev,
> > intel_dig_port->port = port;
> > intel_dig_port->hdmi.hdmi_reg = hdmi_reg;
> > intel_dig_port->dp.output_reg = INVALID_MMIO_REG;
> > + intel_dig_port->max_lanes = 4;
> >
> > intel_hdmi_init_connector(intel_dig_port, intel_connector);
> > }
> > --
> > 2.4.10
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
--
Ville Syrjälä
Intel OTC
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