From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> On HSW/BDW DDI A and E share 2 lanes, so when DDI A requires the shared lanes DDI E can't be used. The lanes are not suppsoed to be dynamically switched between the two uses, so there's no point in registering the CRT connector when DDI E has no lanes. Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/intel_display.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index c3d5a7319ef4..e80387dd6582 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -14259,6 +14259,10 @@ static bool intel_crt_present(struct drm_device *dev) if (HAS_PCH_LPT(dev) && I915_READ(SFUSE_STRAP) & SFUSE_STRAP_CRT_DISABLED) return false; + /* DDI E can't be used if DDI A requires 4 lanes */ + if (HAS_DDI(dev) && I915_READ(DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES) + return false; + if (IS_VALLEYVIEW(dev) && !dev_priv->vbt.int_crt_support) return false; -- 2.4.10 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
