On Mon, 30 Nov 2015, ville.syrjala@xxxxxxxxxxxxxxx wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > No need to read out cdclk from the hardware, we have it already > cached in dev_priv. > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_panel.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c > index d4b18b56f3ca..891a587225e2 100644 > --- a/drivers/gpu/drm/i915/intel_panel.c > +++ b/drivers/gpu/drm/i915/intel_panel.c > @@ -1337,7 +1337,7 @@ static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) > if (IS_PINEVIEW(dev)) > clock = MHz(intel_hrawclk(dev)); > else > - clock = 1000 * dev_priv->display.get_display_clock_speed(dev); > + clock = 1000 * dev_priv->cdclk_freq; > > return clock / (pwm_freq_hz * 32); > } > @@ -1356,7 +1356,7 @@ static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) > if (IS_G4X(dev_priv)) > clock = MHz(intel_hrawclk(dev)); > else > - clock = 1000 * dev_priv->display.get_display_clock_speed(dev); > + clock = 1000 * dev_priv->cdclk_freq; > > return clock / (pwm_freq_hz * 128); > } -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
