On Fri, Nov 20, 2015 at 10:09:18PM +0200, ville.syrjala@xxxxxxxxxxxxxxx wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> We still get spurious pipe underruns on ILK/SNB/IVB under two
> circumstances when dealing with PCH ports:
> * When the pipe has been disabled, but FDI RX/TX is still enabled
> * During FDI link training
>
> Both cases seem to happen at least when we do VGA+HDMI cloning
> from the same pipe. I don't think I've seen them when not cloning,
> but can't be 100% sure.
>
> Disable underrun reporting around those places to eliminate the
> dmesg errors.
>
> Testcase: igt/kms_setmode/basic-clone-single-crtc
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
hsw seems to have a similar problem when both vga and hdmi are used, even
when not cloned. Bad thing is that somehow the underrun reporting gets
into a non-recoverable state and stuck there, so that no underrun and also
nothing else (specifically crc irqs, that's why bat notices) work any
more.
Might be worth a shot to try the same trick there. Of course we still need
to figure out why it can't recover from this, too.
Anyway just an aside, ack on the entire series.
-Daniel
> ---
> drivers/gpu/drm/i915/intel_display.c | 20 +++++++++++++++++++-
> 1 file changed, 19 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 68fb449ded77..8a8104b7947d 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4137,6 +4137,12 @@ static void ironlake_pch_enable(struct drm_crtc *crtc)
> I915_WRITE(FDI_RX_TUSIZE1(pipe),
> I915_READ(PIPE_DATA_M1(pipe)) & TU_SIZE_MASK);
>
> + /*
> + * Sometimes spurious CPU pipe underruns happen during FDI
> + * training, at least with VGA+HDMI cloning. Suppress them.
> + */
> + intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
> +
> /* For PCH output, training FDI link */
> dev_priv->display.fdi_link_train(crtc);
>
> @@ -4170,6 +4176,8 @@ static void ironlake_pch_enable(struct drm_crtc *crtc)
>
> intel_fdi_normal_train(crtc);
>
> + intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
> +
> /* For PCH DP, enable TRANS_DP_CTL */
> if (HAS_PCH_CPT(dev) && intel_crtc->config->has_dp_encoder) {
> const struct drm_display_mode *adjusted_mode =
> @@ -5062,12 +5070,22 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
> drm_crtc_vblank_off(crtc);
> assert_vblank_disabled(crtc);
>
> + /*
> + * Sometimes spurious CPU pipe underruns happen when the
> + * pipe is already disabled, but FDI RX/TX is still enabled.
> + * Happens at least with VGA+HDMI cloning. Suppress them.
> + */
> + if (intel_crtc->config->has_pch_encoder)
> + intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
> +
> intel_disable_pipe(intel_crtc);
>
> ironlake_pfit_disable(intel_crtc, false);
>
> - if (intel_crtc->config->has_pch_encoder)
> + if (intel_crtc->config->has_pch_encoder) {
> ironlake_fdi_disable(crtc);
> + intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
> + }
>
> for_each_encoder_on_crtc(dev, crtc, encoder)
> if (encoder->post_disable)
> --
> 2.4.10
>
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--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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