From: Dave Gordon <david.s.gordon@xxxxxxxxx> With the scheduler, request allocation can happen long before the ring is filled in, and in a different order. So for that case, we update the request head at the start of _final (the initialisation on allocation is stull useful for the direct-submission mode). For: VIZ-2021 Signed-off-by: Dave Gordon <david.s.gordon@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 3 +++ drivers/gpu/drm/i915/intel_lrc.c | 3 +++ 2 files changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index 2d94442..aa4829a 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c @@ -1292,6 +1292,9 @@ int i915_gem_ringbuffer_submission_final(struct i915_execbuffer_params *params) if (ret) goto error; + /* record where we start filling the ring */ + params->request->head = intel_ring_get_tail(params->request->ringbuf); + /* * Unconditionally invalidate gpu caches and ensure that we do flush * any residual writes from the previous batch. diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 7a8c340..b7d9fbd 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -1010,6 +1010,9 @@ int intel_execlists_submission_final(struct i915_execbuffer_params *params) if (ret) goto err; + /* record where we start filling the ring */ + params->request->head = intel_ring_get_tail(params->request->ringbuf); + /* * Unconditionally invalidate gpu caches and ensure that we do flush * any residual writes from the previous batch. -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
