From: Dave Gordon <david.s.gordon@xxxxxxxxx> At present, execlist status/ctx_id and CSBs, not the submission queue For: VIZ-2021 Signed-off-by: Dave Gordon <david.s.gordon@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_drv.h | 9 +++++++++ drivers/gpu/drm/i915/i915_gpu_error.c | 38 +++++++++++++++++++++++++++++++++-- 2 files changed, 45 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 809816a..782591f8 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -556,6 +556,15 @@ struct drm_i915_error_state { u32 rc_psmi; /* sleep state */ u32 semaphore_mboxes[I915_NUM_RINGS - 1]; + /* Execlists */ + u32 execlist_status; + u32 execlist_ctx_id; + u32 execlist_csb_raw_pointer; + u32 execlist_csb_write_pointer; + u32 execlist_csb_read_pointer; + u32 execlist_csb[6]; + u32 execlist_ctx[6]; + struct drm_i915_error_object { int page_count; u64 gtt_offset; diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 27b6ac9..fcb9487 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -247,6 +247,7 @@ static void i915_ring_error_state(struct drm_i915_error_state_buf *m, int ring_idx) { struct drm_i915_error_ring *ring = &error->ring[ring_idx]; + int i; if (!ring->valid) return; @@ -288,7 +289,6 @@ static void i915_ring_error_state(struct drm_i915_error_state_buf *m, err_printf(m, " GFX_MODE: 0x%08x\n", ring->vm_info.gfx_mode); if (INTEL_INFO(dev)->gen >= 8) { - int i; for (i = 0; i < 4; i++) err_printf(m, " PDP%d: 0x%016llx\n", i, ring->vm_info.pdp[i]); @@ -304,6 +304,17 @@ static void i915_ring_error_state(struct drm_i915_error_state_buf *m, err_printf(m, " hangcheck: %s [%d]\n", hangcheck_action_to_str(ring->hangcheck_action), ring->hangcheck_score); + + err_printf(m, " EXECLIST_STATUS: 0x%08x\n", ring->execlist_status); + err_printf(m, " EXECLIST_CTX_ID: 0x%08x\n", ring->execlist_ctx_id); + err_printf(m, " EXECLIST_CSBPTR: 0x%08x\n", ring->execlist_csb_raw_pointer); + err_printf(m, " EXECLIST_CSB_WR: 0x%08x\n", ring->execlist_csb_write_pointer); + err_printf(m, " EXECLIST_CSB_RD: 0x%08x\n", ring->execlist_csb_read_pointer); + + for (i = 0; i < 6; i++) { + err_printf(m, " EXECLIST_CSB[%d]: 0x%08x\n", i, ring->execlist_csb[i]); + err_printf(m, " EXECLIST_CTX[%d]: 0x%08x\n", i, ring->execlist_ctx[i]); + } } void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...) @@ -871,6 +882,7 @@ static void i915_record_ring_state(struct drm_device *dev, struct drm_i915_error_ring *ering) { struct drm_i915_private *dev_priv = dev->dev_private; + int i; if (INTEL_INFO(dev)->gen >= 6) { ering->rc_psmi = I915_READ(ring->mmio_base + 0x50); @@ -961,8 +973,26 @@ static void i915_record_ring_state(struct drm_device *dev, I915_READ(GEN8_RING_PDP_LDW(ring, i)); } } -} + if (i915.enable_execlists) { + u32 status_pointer = I915_READ(RING_CONTEXT_STATUS_PTR(ring)); + u8 write_pointer = status_pointer & 0x07; + u8 read_pointer = ring->next_context_status_buffer; + if (read_pointer > write_pointer) + write_pointer += 6; + + ering->execlist_status = I915_READ(RING_EXECLIST_STATUS_LO(ring)); + ering->execlist_ctx_id = I915_READ(RING_EXECLIST_STATUS_HI(ring)); + ering->execlist_csb_raw_pointer = status_pointer; + ering->execlist_csb_write_pointer = write_pointer; + ering->execlist_csb_read_pointer = read_pointer; + + for (i = 0; i < 6; i++) { + ering->execlist_csb[i] = I915_READ(RING_CONTEXT_STATUS_BUF_LO(ring, i)); + ering->execlist_ctx[i] = I915_READ(RING_CONTEXT_STATUS_BUF_HI(ring, i)); + } + } +} static void i915_gem_record_active_context(struct intel_engine_cs *ring, struct drm_i915_error_state *error, @@ -1248,6 +1278,10 @@ static void i915_capture_reg_state(struct drm_i915_private *dev_priv, if (HAS_HW_CONTEXTS(dev)) error->ccid = I915_READ(CCID); + if (HAS_LOGICAL_RING_CONTEXTS(dev)) { + // Surely something to capture here ... + } + if (INTEL_INFO(dev)->gen >= 8) { error->ier = I915_READ(GEN8_DE_MISC_IER); for (i = 0; i < 4; i++) -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx