On Wed, Nov 18, 2015 at 06:35:15PM +0000, Vivi, Rodrigo wrote:
> On Wed, 2015-11-18 at 11:07 +0100, Daniel Vetter wrote:
> > On Thu, Nov 05, 2015 at 10:50:02AM -0800, Rodrigo Vivi wrote:
> > > PSR will be enabled on every post primary update when it is
> > > ready and parameter allows.
> > > With this we allow test cases to continue using this parameter
> > > for enabling disabling the feature.
> > >
> > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> > > ---
> > > drivers/gpu/drm/i915/intel_dp.c | 2 +-
> > > drivers/gpu/drm/i915/intel_psr.c | 5 -----
> > > 2 files changed, 1 insertion(+), 6 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_dp.c
> > > b/drivers/gpu/drm/i915/intel_dp.c
> > > index 6ab127c..e154a2e 100644
> > > --- a/drivers/gpu/drm/i915/intel_dp.c
> > > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > > @@ -5334,7 +5334,7 @@ void intel_edp_drrs_enable(struct intel_dp
> > > *intel_dp)
> > > return;
> > > }
> > >
> > > - if (intel_crtc->config->psr_ready) {
> > > + if (intel_crtc->config->psr_ready && i915.enable_psr) {
> >
> > I don't get this change ... The pipe config should take into account
> > enable_psr already. If we allow testcases to change this without a
> > modeset, this could result in a lot of racy fun.
>
> Yes, I agree, however igt test cases uses i915.enable_psr to
> enable/disable psr so I'm afraid we will loose this if we add it to
> psr_ready.
Can't the testcase force a full modeset to update psr state? That should
be enough to force-enable psr for testing and then disable it again. And
for a full modeset we need to reevaluate psr anyway, so this won't require
any special code.
full modeset = setCrtc(NULL); setCrtc(mode);
-Daniel
>
> > -Daniel
> >
> > > DRM_DEBUG_KMS("DRRS: PSR will be enabled on this
> > > crtc\n");
> > > return;
> > > }
> > > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > > b/drivers/gpu/drm/i915/intel_psr.c
> > > index 4a9d620..e690db3 100644
> > > --- a/drivers/gpu/drm/i915/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > > @@ -314,11 +314,6 @@ bool intel_psr_ready(struct intel_dp
> > > *intel_dp,
> > > return false;
> > > }
> > >
> > > - if (!i915.enable_psr) {
> > > - DRM_DEBUG_KMS("PSR disable by flag\n");
> > > - return false;
> > > - }
> > > -
> > > if (IS_HASWELL(dev) &&
> > > I915_READ(HSW_STEREO_3D_CTL(pipe_config
> > > ->cpu_transcoder)) &
> > > S3D_ENABLE) {
> > > --
> > > 2.4.3
> > >
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> >
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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